Lines Matching refs:__v4sf
131 return (__m128) __builtin_ia32_andnps128_mask ((__v4sf) __A, in _mm_mask_andnot_ps()
132 (__v4sf) __B, in _mm_mask_andnot_ps()
133 (__v4sf) __W, in _mm_mask_andnot_ps()
139 return (__m128) __builtin_ia32_andnps128_mask ((__v4sf) __A, in _mm_maskz_andnot_ps()
140 (__v4sf) __B, in _mm_maskz_andnot_ps()
141 (__v4sf) in _mm_maskz_andnot_ps()
199 return (__m128) __builtin_ia32_andps128_mask ((__v4sf) __A, in _mm_mask_and_ps()
200 (__v4sf) __B, in _mm_mask_and_ps()
201 (__v4sf) __W, in _mm_mask_and_ps()
207 return (__m128) __builtin_ia32_andps128_mask ((__v4sf) __A, in _mm_maskz_and_ps()
208 (__v4sf) __B, in _mm_maskz_and_ps()
209 (__v4sf) in _mm_maskz_and_ps()
268 return (__m128) __builtin_ia32_xorps128_mask ((__v4sf) __A, in _mm_mask_xor_ps()
269 (__v4sf) __B, in _mm_mask_xor_ps()
270 (__v4sf) __W, in _mm_mask_xor_ps()
276 return (__m128) __builtin_ia32_xorps128_mask ((__v4sf) __A, in _mm_maskz_xor_ps()
277 (__v4sf) __B, in _mm_maskz_xor_ps()
278 (__v4sf) in _mm_maskz_xor_ps()
336 return (__m128) __builtin_ia32_orps128_mask ((__v4sf) __A, in _mm_mask_or_ps()
337 (__v4sf) __B, in _mm_mask_or_ps()
338 (__v4sf) __W, in _mm_mask_or_ps()
344 return (__m128) __builtin_ia32_orps128_mask ((__v4sf) __A, in _mm_maskz_or_ps()
345 (__v4sf) __B, in _mm_maskz_or_ps()
346 (__v4sf) in _mm_maskz_or_ps()
437 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A, in _mm_cvtps_epi64()
444 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A, in _mm_mask_cvtps_epi64()
451 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A, in _mm_maskz_cvtps_epi64()
458 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A, in _mm256_cvtps_epi64()
465 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A, in _mm256_mask_cvtps_epi64()
472 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A, in _mm256_maskz_cvtps_epi64()
479 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A, in _mm_cvtps_epu64()
486 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A, in _mm_mask_cvtps_epu64()
493 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A, in _mm_maskz_cvtps_epu64()
500 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A, in _mm256_cvtps_epu64()
507 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A, in _mm256_mask_cvtps_epu64()
514 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A, in _mm256_maskz_cvtps_epu64()
564 (__v4sf) _mm_setzero_ps(), in _mm_cvtepi64_ps()
571 (__v4sf) __W, in _mm_mask_cvtepi64_ps()
578 (__v4sf) _mm_setzero_ps(), in _mm_maskz_cvtepi64_ps()
585 (__v4sf) _mm_setzero_ps(), in _mm256_cvtepi64_ps()
592 (__v4sf) __W, in _mm256_mask_cvtepi64_ps()
599 (__v4sf) _mm_setzero_ps(), in _mm256_maskz_cvtepi64_ps()
689 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A, in _mm_cvttps_epi64()
696 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A, in _mm_mask_cvttps_epi64()
703 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A, in _mm_maskz_cvttps_epi64()
710 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A, in _mm256_cvttps_epi64()
717 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A, in _mm256_mask_cvttps_epi64()
724 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A, in _mm256_maskz_cvttps_epi64()
731 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A, in _mm_cvttps_epu64()
738 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A, in _mm_mask_cvttps_epu64()
745 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A, in _mm_maskz_cvttps_epu64()
752 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A, in _mm256_cvttps_epu64()
759 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A, in _mm256_mask_cvttps_epu64()
766 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A, in _mm256_maskz_cvttps_epu64()
816 (__v4sf) _mm_setzero_ps(), in _mm_cvtepu64_ps()
823 (__v4sf) __W, in _mm_mask_cvtepu64_ps()
830 (__v4sf) _mm_setzero_ps(), in _mm_maskz_cvtepu64_ps()
837 (__v4sf) _mm_setzero_ps(), in _mm256_cvtepu64_ps()
844 (__v4sf) __W, in _mm256_mask_cvtepu64_ps()
851 (__v4sf) _mm_setzero_ps(), in _mm256_maskz_cvtepu64_ps()
892 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
893 (__v4sf)(__m128)(B), (int)(C), \
894 (__v4sf)_mm_setzero_ps(), \
898 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
899 (__v4sf)(__m128)(B), (int)(C), \
900 (__v4sf)(__m128)(W), (__mmask8)(U)); })
903 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
904 (__v4sf)(__m128)(B), (int)(C), \
905 (__v4sf)_mm_setzero_ps(), \
956 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
957 (__v4sf)_mm_setzero_ps(), \
961 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
962 (__v4sf)(__m128)(W), \
966 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
967 (__v4sf)_mm_setzero_ps(), \
1036 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A, in _mm256_broadcast_f32x2()
1044 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A, in _mm256_mask_broadcast_f32x2()
1052 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A, in _mm256_maskz_broadcast_f32x2()
1248 (__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \
1252 (__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \