37 def _GenerateInputs(emitter, registers, lanes_count, input_address, stride):  argument
47       emitter.EmitAdd(address_register, last_address_register, stride)
52 def _GenerateClear(emitter, clear_type, block):  argument
54     emitter.EmitVMov(clear_type, row, emitter.ImmediateConstant(0))
57 def _GenerateLoadAggregateStore(emitter, registers, lanes_count, elements_count,  argument
60   emitter.EmitNewline()
61   emitter.EmitComment('Load Aggregate Store: %dx%d.' % (lanes_count,
67     _GenerateClear(emitter, 'i8', block)
70     emitter.EmitVLoadE(8, elements_count, row, input_address, None)
73     emitter.EmitVAddw('u8', aggregator, aggregator, row)
75   emitter.EmitVStoreAE(8, 8 * lanes_count, block, output,
81 def _LoadMemoryParameter(emitter, registers, name, source):  argument
83   emitter.EmitLdr(register, registers.MapMemoryParameter(name, source))
87 def _GenerateAggregatorReductionLowRegisters(emitter, registers,  argument
89   emitter.EmitNewline()
90   emitter.EmitComment('Aggregator Reduction.')
92       emitter, registers, aggregators, output_address,
93       _LoadMemoryParameter(emitter, registers, 'multiplicative_sum_offset',
95       _LoadMemoryParameter(emitter, registers, 'additive_sum_offset',
99 def _GenerateAggregatorReductionHighRegisters(emitter, registers,  argument
101   emitter.EmitNewline()
102   emitter.EmitComment('Aggregator Reduction.')
104       emitter, registers, aggregators, output_address,
111 def _GenerateAggregatorReduction(emitter, registers, aggregators,  argument
116   emitter.EmitVMov('32',
117                    emitter.Lane(32, multiplier, 0), multiplicative_sum_offset)
120   emitter.EmitVDup('32', offset, additive_sum_offset)
123     emitter.EmitVPaddl('u16', aggregator, aggregator)
128   emitter.EmitVSumReduce('u32', len(aggregators), 4, reduced, aggregators)
131     emitter.EmitVMulScalar('i32', temp, temp, emitter.Lane(32, multiplier, 0))
134     emitter.EmitVAdd('i32', temp, temp, offset)
136   emitter.EmitVStoreA(1, 32, reduced,
137                       emitter.Dereference(output_address,
144   def __init__(self, emitter, asm_emitter):  argument
145     common.StreamGenerator.__init__(self, emitter, 'RowMajorWithSum')
154     self.emitter.EmitDeclare('int', 'params_count_copy', 'params.count')
156     self.asm_emitter.PushIndent(self.emitter.indent)
202     self.asm_emitter.PopIndent(len(self.emitter.indent))
205 def _GenerateColLoadAggregateStore(emitter, registers, lanes_count,  argument
209   emitter.EmitNewline()
210   emitter.EmitComment('Load Aggregate Store - column major %dx%d' %
216     _GenerateClear(emitter, 'i8', block)
218   block = emitter.EmitLoadColBlock(registers, 8, lanes_count, elements_count,
222     emitter.EmitVAddw('u8', aggregator, aggregator, row)
224   emitter.EmitVStoreAE(8, 8 * lanes_count, block, output,
233   def __init__(self, emitter, asm_emitter):  argument
234     common.StreamGenerator.__init__(self, emitter, 'ColumnMajorWithSum')
243     self.emitter.EmitDeclare('int', 'params_count_copy', 'params.count')
244     self.emitter.EmitDeclare('int', 'params_stride_copy', 'params.stride')
246     self.asm_emitter.PushIndent(self.emitter.indent)
290     self.asm_emitter.PopIndent(len(self.emitter.indent))