Lines Matching full:capable
87 #define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */
311 #define PCI_MSI_FLAGS_MASKBIT 0x0100 /* Per-vector masking capable */
432 #define PCI_X_STATUS_133MHZ 0x00020000 /* 133 MHz capable */
440 #define PCI_X_STATUS_266MHZ 0x40000000 /* 266 MHz capable */
441 #define PCI_X_STATUS_533MHZ 0x80000000 /* 533 MHz capable */
451 #define PCI_X_SSTATUS_133MHZ 0x0002 /* 133 MHz capable */
456 #define PCI_X_SSTATUS_266MHZ 0x4000 /* 266 MHz capable */
457 #define PCI_X_SSTATUS_533MHZ 0x8000 /* 533 MHz capable */
532 #define PCI_EXP_LNKCAP_SDERC 0x00080000 /* Surprise Down Error Reporting Capable */
533 #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
574 #define PCI_EXP_SLTCAP_HPC 0x00000040 /* Hot-Plug Capable */
749 #define PCI_ERR_CAP_ECRC_GENC 0x00000020 /* ECRC Generation Capable */
751 #define PCI_ERR_CAP_ECRC_CHKC 0x00000080 /* ECRC Check Capable */
899 #define PCI_SRIOV_CAP_VFM 0x01 /* VF Migration Capable */
906 #define PCI_SRIOV_CTRL_ARI 0x10 /* ARI Capable Hierarchy */
1018 #define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */
1019 #define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */