60 static struct radeon_bo *bo_open(struct radeon_bo_manager *bom,  in bo_open()  argument
75     bo->base.bom = bom;  in bo_open()
89         r = drmIoctl(bom->fd, DRM_IOCTL_GEM_OPEN, &open_arg);  in bo_open()
105         r = drmCommandWriteRead(bom->fd, DRM_RADEON_GEM_CREATE,  in bo_open()
142     drmIoctl(boi->bom->fd, DRM_IOCTL_GEM_CLOSE, &args);  in bo_unref()
169     r = drmCommandWriteRead(boi->bom->fd,  in bo_map()
178     ptr = drm_mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED, boi->bom->fd, args.addr_ptr);  in bo_map()
211         ret = drmCommandWrite(boi->bom->fd, DRM_RADEON_GEM_WAIT_IDLE,  in bo_wait()
225     ret = drmCommandWriteRead(boi->bom->fd, DRM_RADEON_GEM_BUSY,  in bo_is_busy()
242     r = drmCommandWriteRead(boi->bom->fd,  in bo_set_tiling()
257     r = drmCommandWriteRead(boi->bom->fd,  in bo_get_tiling()
297 void radeon_bo_manager_gem_dtor(struct radeon_bo_manager *bom)  in radeon_bo_manager_gem_dtor()  argument
299     struct bo_manager_gem *bomg = (struct bo_manager_gem*)bom;  in radeon_bo_manager_gem_dtor()
301     if (bom == NULL) {  in radeon_bo_manager_gem_dtor()
334     r = drmIoctl(boi->bom->fd, DRM_IOCTL_GEM_FLINK, &flink);  in radeon_gem_get_kernel_name()
354     r = drmCommandWriteRead(boi->bom->fd,  in radeon_gem_set_domain()
366     ret = drmPrimeHandleToFD(bo_gem->base.bom->fd, bo->handle, DRM_CLOEXEC, handle);  in radeon_gem_prime_share_bo()
371 radeon_gem_bo_open_prime(struct radeon_bo_manager *bom, int fd_handle, uint32_t size)  in radeon_gem_bo_open_prime()  argument
382     bo->base.bom = bom;  in radeon_gem_bo_open_prime()
392     r = drmPrimeFDToHandle(bom->fd, fd_handle, &handle);  in radeon_gem_bo_open_prime()