120   teq1_trace_transmit(frame->header.PCB, frame->header.LEN);  in teq1_transmit()
165   teq1_trace_receive(frame->header.PCB, frame->header.LEN);  in teq1_receive()
185   switch (bs_get(PCB.type, frame->header.PCB)) {  in teq1_fill_info_block()
209     bs_assign(&frame->header.PCB, PCB.I.more_data, 0);  in teq1_fill_info_block()
211       frame->header.PCB |= bs_mask(PCB.I.more_data, 1);  in teq1_fill_info_block()
224   switch (bs_get(PCB.type, frame->header.PCB)) {  in teq1_get_app_data()
255   if (rx_frame->header.PCB == 255) {  in teq1_frame_error_check()
267   switch (bs_get(PCB.type, tx_frame->header.PCB)) {  in teq1_frame_error_check()
270     chained = bs_get(PCB.I.more_data, tx_frame->header.PCB);  in teq1_frame_error_check()
272         bs_get(PCB.I.send_seq, tx_frame->header.PCB);  in teq1_frame_error_check()
279   switch (bs_get(PCB.type, rx_frame->header.PCB)) {  in teq1_frame_error_check()
281     if (rx_frame->header.PCB != S(RESYNC, RESPONSE) &&  in teq1_frame_error_check()
296     if ((bs_get(PCB.I.send_seq, rx_frame->header.PCB)) ==  in teq1_frame_error_check()
299             bs_get(PCB.I.send_seq, rx_frame->header.PCB),  in teq1_frame_error_check()
305     state->card_state->seq.card = bs_get(PCB.I.send_seq, rx_frame->header.PCB);  in teq1_frame_error_check()
319   uint16_t txrx = TEQ1_RULE(tx_frame->header.PCB, rx_frame->header.PCB);  in teq1_rules()
328       txrx = TEQ1_RULE(tx_frame->header.PCB, 255);  in teq1_rules()
337         if (tx_frame->header.PCB != S(RESYNC, REQUEST)) {  in teq1_rules()
338           next_tx->header.PCB = S(RESYNC, REQUEST);  in teq1_rules()
362       next_tx->header.PCB =  in teq1_rules()
363           TEQ1_R(!bs_get(PCB.I.send_seq, rx_frame->header.PCB), 0, 0);  in teq1_rules()
371       next_tx->header.PCB =  in teq1_rules()
372           TEQ1_I(bs_get(PCB.R.next_seq, rx_frame->header.PCB), 0);  in teq1_rules()
385       next_tx->header.PCB = S(WTX, RESPONSE);  in teq1_rules()
404       next_tx->header.PCB = S(IFS, RESPONSE);  in teq1_rules()
421       next_tx->header.PCB =  in teq1_rules()
422           TEQ1_R(!bs_get(PCB.I.send_seq, rx_frame->header.PCB), 0, 0);  in teq1_rules()
443       next_tx->header.PCB = R_err;  in teq1_rules()
444       bs_assign(&next_tx->header.PCB, PCB.R.next_seq,  in teq1_rules()
445                 bs_get(PCB.I.send_seq, tx_frame->header.PCB));  in teq1_rules()
447             next_tx->header.PCB, teq1_pcb_to_name(next_tx->header.PCB));  in teq1_rules()
460       next_tx->header.PCB =  in teq1_rules()
461           TEQ1_R(bs_get(PCB.I.send_seq, tx_frame->header.PCB), 0, 0);  in teq1_rules()
463             next_tx->header.PCB, teq1_pcb_to_name(next_tx->header.PCB));  in teq1_rules()
529       next_tx->header.PCB = S(ABORT, REQUEST);  in teq1_rules()
545     if (rx_frame->header.PCB != 255) {  in teq1_rules()
547       rx_frame->header.PCB = 255;  in teq1_rules()
589   tx->header.PCB = TEQ1_I(!card_state->seq.interface, 0);  in teq1_transceive()
610       rx_frame.header.PCB = 255;  in teq1_transceive()
630       if (tx->header.PCB == S(RESYNC, REQUEST)) {  in teq1_transceive()
637       tx_frame[!active].header.PCB = S(RESYNC, REQUEST);  in teq1_transceive()
684       tx->header.PCB = I(0, 0);  in teq1_transceive()