Lines Matching refs:R12
953 MOV R12,#COFF_STD_2B
954 LSL R12,#2
956 VLD1.S32 D30[0],[R9],R12
957 VLD1.S32 D30[1],[R9],R12
958 VLD1.S32 D31[0],[R9],R12
959 VLD1.S32 D31[1],[R9],R12
986 @R12 ------
1076 MOV R12,#COFF_STD_2B @Get stride of coeffs
1083 ADD R11,R9,R12,LSL #1 @Load address of g_ai2_ihevc_trans_16[2]
1084 LSL R12,R12,#2
1086 VLD1.S16 D26,[R11],R12 @LOAD g_ai2_ihevc_trans_16[2][0-4]]
1088 VLD1.S16 D27,[R11],R12 @LOAD g_ai2_ihevc_trans_16[6][0-4]
1097 VLD1.S16 D26,[R11],R12 @LOAD g_ai2_ihevc_trans_16[10][0-4]
1103 VLD1.S16 D27,[R11],R12 @LOAD g_ai2_ihevc_trans_16[14][0-4]
1147 MOV R12,#COFF_STD_2B @Get coeffs stride
1148 LSL R12,R12,#1
1151 VLD1.S16 {d4,d5},[R11],R12 @g_ai2_ihevc_trans_16[1][0-7] -- 2 cycles
1168 VLD1.S16 {d4,d5},[R11],R12 @g_ai2_ihevc_trans_16[3][0-7]
1185 VLD1.S16 {d4,d5},[R11],R12 @g_ai2_ihevc_trans_16[5][0-7]
1187 VLD1.S16 {d6,d7},[R11],R12 @g_ai2_ihevc_trans_16[7][0-7]
1221 VLD1.S16 {d4,d5},[R11],R12 @g_ai2_ihevc_trans_16[9][0-7]
1237 VLD1.S16 {d4,d5},[R11],R12 @g_ai2_ihevc_trans_16[11][0-7]
1251 VLD1.S16 {d4,d5},[R11],R12 @g_ai2_ihevc_trans_16[13][0-7]
1253 VLD1.S16 {d2,d3},[R11],R12 @g_ai2_ihevc_trans_16[15][0-7]
1339 MOV R12,#COFF_STD_W
1340 LSL R12,R12,#2
1341 VLD1.S32 D28,[R9],R12
1342 VLD1.S32 D29,[R9],R12
1343 VLD1.S32 D30,[R9],R12
1344 VLD1.S32 D31,[R9],R12
1345 SUB R9,R9,R12,LSL #2
1428 MOV R12,#COFF_STD_W
1429 ADD R11,R9,R12,LSL #1 @Get to the 2nd row of src
1430 LSL R12,R12,#2
1432 …VLD1.S32 {D14,D15},[R11],R12 @LOAD g_ai2_ihevc_trans_16[2][0-4] -> 2G0 2G1 2G2 2G3, 2-cycle…
1442 VLD1.S32 {D16,D17},[R11],R12 @LOAD g_ai2_ihevc_trans_16[6][0-4]
1468 VLD1.S32 {D14,D15},[R11],R12 @LOAD g_ai2_ihevc_trans_16[10][0-4]
1474 VLD1.S32 {D16,D17},[R11],R12 @LOAD g_ai2_ihevc_trans_16[14][0-4]
1485 MOV R12,#COFF_STD_W
1486 ADD R11,R9,R12 @Get 1ST row
1487 LSL R12,R12,#1
1497 VLD1.S32 {Q2,Q3},[R11],R12 @g_ai2_ihevc_trans_16[1][0-7]
1514 VLD1.S32 {Q2,Q3},[R11],R12 @g_ai2_ihevc_trans_16[3][0-7]
1521 VLD1.S32 {Q2,Q3},[R11],R12 @g_ai2_ihevc_trans_16[5][0-7]
1528 VLD1.S32 {Q2,Q3},[R11],R12 @g_ai2_ihevc_trans_16[7][0-7]
1542 VLD1.S32 {Q2,Q3},[R11],R12 @g_ai2_ihevc_trans_16[0][0-7]
1559 VLD1.S32 {Q2,Q3},[R11],R12 @g_ai2_ihevc_trans_16[1][0-7]
1572 VLD1.S32 {Q2,Q3},[R11],R12 @g_ai2_ihevc_trans_16[2][0-7]
1580 VLD1.S32 {Q2,Q3},[R11],R12 @g_ai2_ihevc_trans_16[3][0-7]