Lines Matching refs:S32
221 S32 y, rnd; \
257 S32 mvx_q8 = (ps_mv)->mvx << 8; \
258 S32 mvy_q8 = (ps_mv)->mvy << 8; \
259 S32 mvcx_q8 = (ps_data)->s_centroid.i4_pos_x_q8; \
260 S32 mvcy_q8 = (ps_data)->s_centroid.i4_pos_y_q8; \
262 S32 mvdx_q8 = mvx_q8 - mvcx_q8; \
263 S32 mvdy_q8 = mvy_q8 - mvcy_q8; \
265 S32 mvdx = (mvdx_q8 + (1 << 7)) >> 8; \
266 S32 mvdy = (mvdy_q8 + (1 << 7)) >> 8; \
268 S32 mvd = ABS(mvdx) + ABS(mvdy); \
276 S32 i4_j; \
303 S32 m; \
305 S32 num_clusters_evaluated = 0; \
336 S32 center_mvx; \
337 S32 center_mvy; \
338 S32 mvdx; \
339 S32 mvdy; \
341 S32 columnar_presence; \
375 S32 j, k; \
377 S32 num_clusters_evaluated = 0; \
378 S32 num_clusters = ps_cluster_blk->num_clusters; \
379 S32 num_outliers_present = 0; \
418 S32 ref_idx = as_outliers[j].ref_idx; \
498 (((((S32)w0) * ((S32)p0) + ((S32)w1) * ((S32)p1)) >> shift) + rnd)
1076 typedef S32 SAD_GRID_T[9][MAX_NUM_PARTS];
1134 S32 i4_sad;
1140 S32 i4_mv_cost;
1143 S32 i4_tot_cost;
1149 S32 i4_sdi;
1225 S32 i4_tot_cost;
1236 S32 ai4_tu_split_flag[4];
1271 S32 i4_pred_stride;
1277 S32 i4_sad;
1278 S32 i4_satd;
1279 S32 i4_mv_cost;
1280 S32 i4_rate;
1281 S32 i4_dist;
1282 S32 i4_tot_cost;
1284 S32 ai4_part_costs[4];
1292 S32 ai4_tu_split_flag[4];
1317 S32 i4_used;
1319 S32 i4_tot;
1322 S32 i4_size;
1323 S32 i4_align;
1338 S32 i4_total;
1340 S32 i4_used;
1387 S32 lambda;
1390 S32 lambda_q_shift;
1393 S32 pred_lx;
1396 S32 mv_pel;
1453 S32 i4_part_mask;
1482 S32 best_cu_cost;
1541 S32 i4_num_mvs_per_ref;
1543 S32 i4_num_ref;
1545 S32 i4_num_mvs_per_blk;
1549 S32 i4_num_blks_per_row;
1552 S32 i4_num_mvs_per_row;
1560 S32 max_num_mvs_per_row;
1588 S32 i4_num_rows;
1589 S32 i4_num_cols;
1590 S32 i4_shift_x;
1591 S32 i4_shift_y;
1592 S32 i4_lobe1_size;
1593 S32 i4_lobe2_size;
1594 S32 i4_min_x;
1595 S32 i4_min_y;
1596 S32 i4_num_bins;
1597 S32 ai4_bin_count[MAX_NUM_BINS];
1614 S32 i4_disp_wd;
1616 S32 i4_disp_ht;
1618 S32 i4_wd;
1620 S32 i4_ht;
1622 S32 i4_pad_x_inp;
1624 S32 i4_pad_y_inp;
1626 S32 i4_pad_x_rec;
1628 S32 i4_pad_y_rec;
1634 S32 i4_rec_offset;
1636 S32 i4_inp_offset;
1638 S32 i4_inp_stride;
1640 S32 i4_rec_stride;
1642 S32 i4_poc;
1676 S32 ai4_ref_id_to_poc_lc[MAX_NUM_REF];
1678 S32 ai4_ref_id_to_disp_num[MAX_NUM_REF];
1681 S32 i4_is_free;
1684 S32 i4_idr_gop_num;
1687 S32 i4_is_reference;
1690 S32 i4_non_ref_free;
1694 typedef S32 (*PF_MV_COST_FXN)(search_node_t *, pred_ctxt_t *, PART_ID_T, S32);
1733 S32 i4_encode;
1734 S32 explicit_ref;
1735 S32 i4_num_ref_fpel;
1736 S32 i4_num_fpel_results;
1738 S32 i4_num_results_per_part;
1740 S32 i4_num_mvbank_results;
1742 S32 i4_use_rec_in_fpel;
1744 S32 i4_enable_4x4_part;
1745 S32 i4_layer_id;
1747 S32 i4_num_32x32_merge_results;
1748 S32 i4_num_64x64_merge_results;
1750 S32 i4_use_satd_cu_merge;
1752 S32 i4_num_steps_post_refine_fpel;
1753 S32 i4_num_steps_fpel_refine;
1754 S32 i4_num_steps_hpel_refine;
1755 S32 i4_num_steps_qpel_refine;
1756 S32 i4_use_satd_subpel;
1759 S32 bidir_enabled;
1760 S32 lambda_inp;
1761 S32 lambda_recon;
1762 S32 lambda_q_shift;
1764 S32 limit_active_partitions;
1766 S32 sdi_threshold;
1792 S32 i4_layer_id;
1795 S32 i4_start_step;
1798 S32 i4_max_iters;
1801 S32 i4_num_ref;
1804 S32 num_results;
1810 S32 do_full_search;
1813 S32 lambda;
1814 S32 lambda_q_shift;
1817 S32 full_search_step;
1838 S32 a_wpred_wt[MAX_NUM_REF];
1839 S32 a_inv_wpred_wt[MAX_NUM_REF];
1840 S32 a_wpred_off[MAX_NUM_REF];
1841 S32 wpred_log_wdc;
1843 S32 ai4_shift_val[MAX_NUM_REF];
1901 S32 i4_num_init_candts;
1903 S32 i4_num_steps_post_refine;
1909 S32 i4_start_step;
1912 S32 i4_use_satd;
1915 S32 i4_use_rec;
1918 S32 i4_part_mask;
1921 S32 i4_x_off;
1922 S32 i4_y_off;
1928 S32 i4_max_iters;
1941 S32 full_search_step;
1944 S32 i4_inp_stride;
1947 S32 i4_cu_x_off;
1948 S32 i4_cu_y_off;
1954 S32 i4_num_search_nodes;
1960 S32 i4_alpha_stim_multiplier;
1988 S32 i4_inp_stride;
1990 S32 i4_ref_stride;
1992 S32 i4_part_mask;
1994 S32 i4_grid_mask;
2004 S32 *pi4_sad_grid;
2007 S32 *pi4_tu_split_flags;
2010 S32 *pi4_child_cost;
2013 S32 *pi4_child_tu_split_flags;
2016 S32 *pi4_child_tu_early_cbf;
2019 S32 *pi4_tu_early_cbf;
2022 S32 *pi4_tu_early_cbf_threshold;
2025 S32 i4_dc_val;
2028 S32 i4_blk_wd;
2029 S32 i4_blk_ht;
2035 S32 *pi4_valid_part_ids;
2037 S32 i4_step;
2040 S32 i4_num_partitions;
2043 S32 i4_tu_split_cost;
2091 S32 i4_num_16x16_in;
2092 S32 i4_num_32x32_in;
2093 S32 i4_num_32x32_unified_out;
2094 S32 i4_num_64x64_in;
2095 S32 i4_num_64x64_unified_out;
2102 S32 i4_num_part_type;
2105 S32 i4_cu_64x64_split;
2107 S32 ai4_cu_32x32_split[4];
2110 S32 i4_ctb_x;
2111 S32 i4_ctb_y;
2135 S32 *pi4_sad_grid;
2138 S32 *pi4_tu_split_flags;
2150 S32 *pi4_valid_part_ids;
2156 S32 i4_grid_mask;
2164 S32 i4_min_id;
2167 S32 i4_step;
2170 S32 i4_part_mask;
2173 S32 i4_min_cost;
2203 S32 i4_stride;
2206 S32 i4_start_offset;
2244 S32 max_dist_from_centroid;
2260 S32 best_inter_cost;
2278 S32 best_inter_cost;
2300 S32 best_inter_cost;
2316 S32 nodes_created_in_cu_tree;
2318 S32 *pi4_blk_8x8_mask;
2320 S32 blk_32x32_mask;
2322 S32 sdi_threshold;
2324 S32 i4_frame_qstep;
2326 S32 i4_frame_qstep_multiplier;
2330 S32 ai4_part_mask[16];
2382 S32 i4_seg_info_avail;
2385 S32 i4_part_mask;
2388 S32 i4_num_inp_results;
2391 S32 i4_use_satd;
2397 S32 i4_num_ref;
2400 S32 i4_use_rec;
2405 S32 i4_mv_grid_opt;
2408 S32 log_ctb_size;
2410 S32 i4_ctb_x_off;
2412 S32 i4_ctb_y_off;
2416 S32 i4_num_pred_dir_actual;
2420 S32 i4_alpha_stim_multiplier;
2435 S32 i4_num_ref;
2451 S32 i4_shift;
2453 S32 i4_num_active_ref_l0;
2455 S32 i4_num_active_ref_l1;
2457 S32 i4_num_results_to_store;
2469 S32 i4_num_16x16_candts;
2470 S32 i4_num_32x32_candts;
2471 S32 i4_num_64x64_candts;
2474 S32 i4_ctb_x_off;
2475 S32 i4_ctb_y_off;
2478 S32 i4_num_steps_hpel_refine;
2479 S32 i4_num_steps_qpel_refine;
2482 S32 i4_use_satd;
2503 S32 i4_pred_stride;
2506 S32 i4_inp_type;
2509 S32 i4_inp_stride;
2519 S32 i4_use_satd_cu_merge;
2533 S32 bidir_enabled;
2557 S32 i4_num_act_ref_l0;
2559 S32 i4_num_act_ref_l1;
2631 S32 cu_16x16_valid_flag;
2648 S32 sdi;
2650 S32 ref_idx;
2652 S32 cluster_id;
2706 S32 ai4_ref_idx_to_poc_lc[MAX_NUM_REF];
2709 S32 ai4_ref_idx_to_disp_num[MAX_NUM_REF];
2712 S32 i4_prev_poc;
2715 S32 i4_curr_poc;
2718 S32 num_layers;
2721 S32 max_num_ref;
2727 S32 num_layers_explicit_search;
2733 S32 max_num_results;
2736 S32 max_num_results_coarse;
2748 S32 a_ref_to_descr_id[MAX_NUM_REF];
2757 S32 a_ref_idx_lc_to_l0[MAX_NUM_REF];
2758 S32 a_ref_idx_lc_to_l1[MAX_NUM_REF];
2761 S32 a_wd[MAX_NUM_LAYERS];
2762 S32 a_ht[MAX_NUM_LAYERS];
2775 S32 num_ref_past;
2776 S32 num_ref_future;
2799 S32 num_b_frms;
2802 S32 frm_qstep;
2813 S32 i4_wt_pred_enable_flag;
2824 S32 i4_num_row_bufs;
2827 S32 ai4_row_index[(HEVCE_MAX_HEIGHT >> 1) >> 2];
2830 S32 i4_L1_hme_best_cost;
2836 S32 i4_L1_hme_sad;
2853 S32 i4_num_blks_high_sad;
2856 S32 i4_num_blks;
3007 S32 ai4_ref_idx_to_poc_lc[MAX_NUM_REF];
3010 S32 i4_prev_poc;
3013 S32 i4_curr_poc;
3030 S32 num_layers;
3033 S32 max_num_ref;
3039 S32 num_layers_explicit_search;
3045 S32 max_num_results;
3048 S32 max_num_results_coarse;
3060 S32 a_ref_to_descr_id[MAX_NUM_REF];
3069 S32 a_ref_idx_lc_to_l0[MAX_NUM_REF];
3070 S32 a_ref_idx_lc_to_l1[MAX_NUM_REF];
3073 S32 i4_wd;
3074 S32 i4_ht;
3094 S32 num_ref_past;
3095 S32 num_ref_future;
3114 S32 log_ctb_size;
3151 S32 num_b_frms;
3154 S32 frm_qstep;
3157 S32 qstep_ls8;
3168 S32 i4_wt_pred_enable_flag;
3348 S32 *pi4_ref_id_lc_to_l0_map;
3350 S32 *pi4_ref_id_lc_to_l1_map;
3352 S32 i4_pos_x;
3354 S32 i4_pos_y;
3356 S32 i4_num_act_ref_l0;
3358 S32 i4_num_act_ref_l1;
3364 S32 i4_max_num_init_cands;
3394 S32 i4_pred_stride;
3417 hme_search_prms_t *, wgt_pred_ctxt_t *, err_prms_t *, result_upd_prms_t *, U08 **, S32);