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Lines Matching refs:Def

93   LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
255 const MachineOperand &Def = MI.getOperand(0); in transferUsedLanes() local
256 unsigned DefReg = Def.getReg(); in transferUsedLanes()
290 const MachineOperand &Def = *MI.defs().begin(); in transferDefinedLanesStep() local
291 unsigned DefReg = Def.getReg(); in transferDefinedLanesStep()
301 DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes); in transferDefinedLanesStep()
313 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def, in transferDefinedLanes() argument
315 const MachineInstr &MI = *Def.getParent(); in transferDefinedLanes()
349 assert(Def.getSubReg() == 0 && in transferDefinedLanes()
351 DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg()); in transferDefinedLanes()
361 const MachineOperand &Def = *MRI->def_begin(Reg); in determineInitialDefinedLanes() local
362 const MachineInstr &DefMI = *Def.getParent(); in determineInitialDefinedLanes()
370 if (Def.isDead()) in determineInitialDefinedLanes()
408 DefinedLanes |= transferDefinedLanes(Def, OpNum, MODefinedLanes); in determineInitialDefinedLanes()
412 if (DefMI.isImplicitDef() || Def.isDead()) in determineInitialDefinedLanes()
415 assert(Def.getSubReg() == 0 && in determineInitialDefinedLanes()
433 const MachineOperand &Def = *UseMI.defs().begin(); in determineInitialUsedLanes() local
434 unsigned DefReg = Def.getReg(); in determineInitialUsedLanes()
475 const MachineOperand &Def = MI.getOperand(0); in isUndefInput() local
476 unsigned DefReg = Def.getReg(); in isUndefInput()
517 MachineOperand &Def = *MRI->def_begin(Reg); in runOnce() local
518 const MachineInstr &MI = *Def.getParent(); in runOnce()