296     unsigned DefIdx;  member in __anond69149540111::ValueTracker
354         : Def(nullptr), DefIdx(0), DefSubReg(DefSubReg), Reg(Reg),  in ValueTracker()
358         DefIdx = MRI.def_begin(Reg).getOperandNo();  in ValueTracker()
369     ValueTracker(const MachineInstr &MI, unsigned DefIdx, unsigned DefSubReg,  in ValueTracker()  argument
373         : Def(&MI), DefIdx(DefIdx), DefSubReg(DefSubReg),  in ValueTracker()
375       assert(DefIdx < Def->getDesc().getNumDefs() &&  in ValueTracker()
376              Def->getOperand(DefIdx).isReg() && "Invalid definition");  in ValueTracker()
377       Reg = Def->getOperand(DefIdx).getReg();  in ValueTracker()
1672   if (Def->getOperand(DefIdx).getSubReg() != DefSubReg)  in getNextSourceFromCopy()
1691   if (Def->getOperand(DefIdx).getSubReg() != DefSubReg)  in getNextSourceFromBitcast()
1697   for (unsigned OpIdx = DefIdx + 1, EndOpIdx = SrcIdx; OpIdx != EndOpIdx;  in getNextSourceFromBitcast()
1719   if (Def->getOperand(DefIdx).getSubReg())  in getNextSourceFromRegSequence()
1742   if (!TII->getRegSequenceInputs(*Def, DefIdx, RegSeqInputRegs))  in getNextSourceFromRegSequence()
1768   if (Def->getOperand(DefIdx).getSubReg())  in getNextSourceFromInsertSubreg()
1781   if (!TII->getInsertSubregInputs(*Def, DefIdx, BaseReg, InsertedReg))  in getNextSourceFromInsertSubreg()
1797   const MachineOperand &MODef = Def->getOperand(DefIdx);  in getNextSourceFromInsertSubreg()
1834   if (!TII->getExtractSubregInputs(*Def, DefIdx, ExtractSubregInputReg))  in getNextSourceFromExtractSubreg()
1889   assert(((Def->getOperand(DefIdx).isDef() &&  in getNextSourceImpl()
1890            (DefIdx < Def->getDesc().getNumDefs() ||  in getNextSourceImpl()
1892           Def->getOperand(DefIdx).isImplicit()) &&  in getNextSourceImpl()
1937       DefIdx = MRI.def_begin(Reg).getOperandNo();  in getNextSource()