Lines Matching refs:PrevMask
28 LaneBitmask PrevMask, LaneBitmask NewMask) { in increaseSetPressure() argument
29 assert((PrevMask & ~NewMask) == 0 && "Must not remove bits"); in increaseSetPressure()
30 if (PrevMask != 0 || NewMask == 0) in increaseSetPressure()
42 LaneBitmask PrevMask, LaneBitmask NewMask) { in decreaseSetPressure() argument
43 assert((NewMask & !PrevMask) == 0 && "Must not add bits"); in decreaseSetPressure()
44 if (NewMask != 0 || PrevMask == 0) in decreaseSetPressure()
668 LaneBitmask PrevMask = LiveRegs.insert(P); in addLiveRegs() local
669 LaneBitmask NewMask = PrevMask | P.LaneMask; in addLiveRegs()
670 increaseRegPressure(P.RegUnit, PrevMask, NewMask); in addLiveRegs()
683 LaneBitmask PrevMask; in discoverLiveInOrOut() local
686 PrevMask = 0; in discoverLiveInOrOut()
690 PrevMask = I->LaneMask; in discoverLiveInOrOut()
691 NewMask = PrevMask | Pair.LaneMask; in discoverLiveInOrOut()
694 increaseSetPressure(P.MaxSetPressure, *MRI, RegUnit, PrevMask, NewMask); in discoverLiveInOrOut()