2170   B.RegVT = VT.getSimpleVT();  in visitBitTestHeader()
2171   B.Reg = FuncInfo.CreateReg(B.RegVT);  in visitBitTestHeader()
2200   MVT VT = BB.RegVT;  in visitBitTestCase()
6486       MVT RegVT = *PhysReg.second->vt_begin();  in GetRegistersForValue()  local
6487       if (RegVT.getSizeInBits() == OpInfo.CallOperand.getValueSizeInBits()) {  in GetRegistersForValue()
6489                                          RegVT, OpInfo.CallOperand);  in GetRegistersForValue()
6490         OpInfo.ConstraintVT = RegVT;  in GetRegistersForValue()
6491       } else if (RegVT.isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) {  in GetRegistersForValue()
6496         RegVT = MVT::getIntegerVT(OpInfo.ConstraintVT.getSizeInBits());  in GetRegistersForValue()
6498                                          RegVT, OpInfo.CallOperand);  in GetRegistersForValue()
6499         OpInfo.ConstraintVT = RegVT;  in GetRegistersForValue()
6506   MVT RegVT;  in GetRegistersForValue()  local
6519     RegVT = *RC->vt_begin();  in GetRegistersForValue()
6538     OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);  in GetRegistersForValue()
6545     RegVT = *RC->vt_begin();  in GetRegistersForValue()
6547       ValueVT = RegVT;  in GetRegistersForValue()
6554     OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);  in GetRegistersForValue()
6902           MVT RegVT = AsmNodeOperands[CurOp+1].getSimpleValueType();  in visitInlineAsm()  local
6903           MatchedRegs.RegVTs.push_back(RegVT);  in visitInlineAsm()
6907             if (const TargetRegisterClass *RC = TLI.getRegClassFor(RegVT))  in visitInlineAsm()
7972     MVT RegVT = TLI->getRegisterType(*CurDAG->getContext(), VT);  in LowerArguments()  local
7975                                         RegVT, VT, nullptr, AssertOp);  in LowerArguments()
7979     unsigned SRetReg = RegInfo.createVirtualRegister(TLI->getRegClassFor(RegVT));  in LowerArguments()