155   const MachineInstr *DefMI, unsigned DefOperIdx,  in computeOperandLatency()  argument
159     return TII->defaultDefLatency(SchedModel, *DefMI);  in computeOperandLatency()
164       OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx,  in computeOperandLatency()
168       unsigned DefClass = DefMI->getDesc().getSchedClass();  in computeOperandLatency()
175     unsigned InstrLatency = TII->getInstrLatency(&InstrItins, *DefMI);  in computeOperandLatency()
183         std::max(InstrLatency, TII->defaultDefLatency(SchedModel, *DefMI));  in computeOperandLatency()
187   const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);  in computeOperandLatency()
188   unsigned DefIdx = findDefIdx(DefMI, DefOperIdx);  in computeOperandLatency()
211   if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit()  in computeOperandLatency()
212       && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef()  in computeOperandLatency()
215            << *DefMI << " (Try with MCSchedModel.CompleteModel set to false)";  in computeOperandLatency()
222   return DefMI->isTransient() ? 0 : TII->defaultDefLatency(SchedModel, *DefMI);  in computeOperandLatency()
268 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,  in computeOutputLatency()  argument
281   unsigned Reg = DefMI->getOperand(DefOperIdx).getReg();  in computeOutputLatency()
282   const MachineFunction &MF = *DefMI->getParent()->getParent();  in computeOutputLatency()
285     return computeInstrLatency(DefMI);  in computeOutputLatency()
290     const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);  in computeOutputLatency()