222   MachineInstr *KillMI = nullptr;  in sink3AddrInstruction()  local
234     KillMI = LIS->getInstructionFromIndex(I->end);  in sink3AddrInstruction()
236   if (!KillMI) {  in sink3AddrInstruction()
240       KillMI = UseMO.getParent();  in sink3AddrInstruction()
248   if (!KillMI || KillMI->getParent() != MBB || KillMI == MI ||  in sink3AddrInstruction()
249       MachineBasicBlock::iterator(KillMI) == OldPos || KillMI->isTerminator())  in sink3AddrInstruction()
259   MachineBasicBlock::iterator KillPos = KillMI;  in sink3AddrInstruction()
281         if (&OtherMI == KillMI && MOReg == SavedReg)  in sink3AddrInstruction()
300       LV->replaceKillInstruction(SavedReg, *KillMI, *MI);  in sink3AddrInstruction()
830   MachineInstr *KillMI = nullptr;  in rescheduleMIBelowKill()  local
842     KillMI = LIS->getInstructionFromIndex(I->end);  in rescheduleMIBelowKill()
844     KillMI = LV->getVarInfo(Reg).findKill(MBB);  in rescheduleMIBelowKill()
846   if (!KillMI || MI == KillMI || KillMI->isCopy() || KillMI->isCopyLike())  in rescheduleMIBelowKill()
850   if (KillMI->hasUnmodeledSideEffects() || KillMI->isCall() ||  in rescheduleMIBelowKill()
851       KillMI->isBranch() || KillMI->isTerminator())  in rescheduleMIBelowKill()
856   if (isTwoAddrUse(*KillMI, Reg, DstReg))  in rescheduleMIBelowKill()
898   MachineBasicBlock::iterator KillPos = KillMI;  in rescheduleMIBelowKill()
939         assert((MOReg != Reg || &OtherMI == KillMI) &&  in rescheduleMIBelowKill()
971     LV->removeVirtualRegisterKilled(Reg, *KillMI);  in rescheduleMIBelowKill()
975   DEBUG(dbgs() << "\trescheduled below kill: " << *KillMI);  in rescheduleMIBelowKill()
1017   MachineInstr *KillMI = nullptr;  in rescheduleKillAboveMI()  local
1029     KillMI = LIS->getInstructionFromIndex(I->end);  in rescheduleKillAboveMI()
1031     KillMI = LV->getVarInfo(Reg).findKill(MBB);  in rescheduleKillAboveMI()
1033   if (!KillMI || MI == KillMI || KillMI->isCopy() || KillMI->isCopyLike())  in rescheduleKillAboveMI()
1038   if (isTwoAddrUse(*KillMI, Reg, DstReg))  in rescheduleKillAboveMI()
1042   if (!KillMI->isSafeToMove(AA, SeenStore))  in rescheduleKillAboveMI()
1049   for (const MachineOperand &MO : KillMI->operands()) {  in rescheduleKillAboveMI()
1058       bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS));  in rescheduleKillAboveMI()
1074        llvm::make_range(mi, MachineBasicBlock::iterator(KillMI))) {  in rescheduleKillAboveMI()
1125   MachineBasicBlock::iterator From = KillMI;  in rescheduleKillAboveMI()
1136     LIS->handleMove(*KillMI);  in rescheduleKillAboveMI()
1138     LV->removeVirtualRegisterKilled(Reg, *KillMI);  in rescheduleKillAboveMI()
1142   DEBUG(dbgs() << "\trescheduled kill: " << *KillMI);  in rescheduleKillAboveMI()