115   bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
119                           unsigned RegA, unsigned RegB, unsigned Dist);
534 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {  in regsAreCompatible()  argument
535   if (RegA == RegB)  in regsAreCompatible()
537   if (!RegA || !RegB)  in regsAreCompatible()
539   return TRI->regsOverlap(RegA, RegB);  in regsAreCompatible()
674 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){  in isProfitableToConv3Addr()  argument
681   unsigned FromRegB = getMappedReg(RegB, SrcRegMap);  in isProfitableToConv3Addr()
693                                               unsigned RegA, unsigned RegB,  in convertInstTo3Addr()  argument
710   if (NewMI->findRegisterUseOperand(RegB, false, TRI))  in convertInstTo3Addr()
714     Sunk = sink3AddrInstruction(NewMI, RegB, mi);  in convertInstTo3Addr()
726   DstRegMap.erase(RegB);  in convertInstTo3Addr()
1456   unsigned RegB = 0;  in processTiedPairs()  local
1467     RegB = MI->getOperand(SrcIdx).getReg();  in processTiedPairs()
1470     if (RegA == RegB) {  in processTiedPairs()
1479     assert(TargetRegisterInfo::isVirtualRegister(RegB) &&  in processTiedPairs()
1497     MIB.addReg(RegB, 0, SubRegB);  in processTiedPairs()
1498     const TargetRegisterClass *RC = MRI->getRegClass(RegB);  in processTiedPairs()
1508         assert(TRI->getMatchingSuperReg(RegA, SubRegB, MRI->getRegClass(RegB))  in processTiedPairs()
1534     assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() &&  in processTiedPairs()
1543         TargetRegisterInfo::isVirtualRegister(RegB))  in processTiedPairs()
1552     SrcRegMap[RegA] = RegB;  in processTiedPairs()
1559         if (MO.isReg() && MO.getReg() == RegB && MO.getSubReg() == SubRegB &&  in processTiedPairs()
1572     if (RemovedKillFlag && LV && LV->getVarInfo(RegB).removeKill(*MI)) {  in processTiedPairs()
1575       LV->addVirtualRegisterKilled(RegB, *PrevMI);  in processTiedPairs()
1580       LiveInterval &LI = LIS->getInterval(RegB);  in processTiedPairs()
1596       if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) {  in processTiedPairs()