323     unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in fastMaterializeAlloca()  local
346   unsigned ResultReg = createResultReg(RC);  in materializeInt()  local
383     unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));  in materializeFP()  local
403   unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));  in materializeFP()  local
427   unsigned ResultReg;  in materializeGV()  local
977     unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in simplifyAddress()  local
988     unsigned ResultReg = 0;  in simplifyAddress()  local
1026     unsigned ResultReg;  in simplifyAddress()  local
1133   unsigned ResultReg = 0;  in emitAddSub()  local
1254   unsigned ResultReg;  in emitAddSub_rr()  local
1299   unsigned ResultReg;  in emitAddSub_ri()  local
1339   unsigned ResultReg;  in emitAddSub_rs()  local
1382   unsigned ResultReg;  in emitAddSub_rx()  local
1480   unsigned ResultReg;  in emitAdd_ri_()  local
1542   unsigned ResultReg = 0;  in emitLogicalOp()  local
1640   unsigned ResultReg =  in emitLogicalOp_ri()  local
1683   unsigned ResultReg =  in emitLogicalOp_rs()  local
1809   unsigned ResultReg = createResultReg(RC);  in emitLoad()  local
1843   unsigned ResultReg;  in selectAddSub()  local
1869   unsigned ResultReg;  in selectLogicalOp()  local
1938   unsigned ResultReg =  in selectLoad()  local
2446   unsigned ResultReg = 0;  in selectCmp()  local
2572   unsigned ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg,  in optimizeSelect()  local
2702   unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,  in selectSelect()  local
2717   unsigned ResultReg = createResultReg(&AArch64::FPR64RegClass);  in selectFPExt()  local
2733   unsigned ResultReg = createResultReg(&AArch64::FPR32RegClass);  in selectFPTrunc()  local
2766   unsigned ResultReg = createResultReg(  in selectFPToInt()  local
2814   unsigned ResultReg = fastEmitInst_r(Opc, TLI.getRegClassFor(DestVT), SrcReg,  in selectIntToFP()  local
2922     unsigned ResultReg = createResultReg(RC);  in fastLowerArguments()  local
3047     unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT));  in finishCall()  local
3220     unsigned ResultReg = emitLoad(VT, VT, Src);  in tryEmitSmallMemCpy()  local
3484     unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));  in fastLowerIntrinsicCall()  local
3507     unsigned ResultReg = fastEmit_r(VT, VT, ISD::FSQRT, Op0Reg, Op0IsKill);  in fastLowerIntrinsicCall()  local
3801   unsigned ResultReg;  in selectTrunc()  local
3844     unsigned ResultReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1);  in emiti1Ext()  local
3927   unsigned ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op0IsKill, Op1Reg,  in emitLSL_rr()  local
3955       unsigned ResultReg = createResultReg(RC);  in emitLSL_ri()  local
4034   unsigned ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op0IsKill, Op1Reg,  in emitLSR_rr()  local
4062       unsigned ResultReg = createResultReg(RC);  in emitLSR_ri()  local
4155   unsigned ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op0IsKill, Op1Reg,  in emitASR_rr()  local
4183       unsigned ResultReg = createResultReg(RC);  in emitASR_ri()  local
4431         unsigned ResultReg = createResultReg(&AArch64::GPR64RegClass);  in selectIntExt()  local
4452   unsigned ResultReg = emitIntExt(SrcVT, SrcReg, RetVT, IsZExt);  in selectIntExt()  local
4499   unsigned ResultReg = fastEmitInst_rrr(MSubOpc, RC, QuotReg, /*IsKill=*/true,  in selectRem()  local
4551       unsigned ResultReg =  in selectMul()  local
4570   unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src0IsKill, Src1Reg, Src1IsKill);  in selectMul()  local
4588     unsigned ResultReg = 0;  in selectShift()  local
4647   unsigned ResultReg = 0;  in selectShift()  local
4700   unsigned ResultReg = fastEmitInst_r(Opc, RC, Op0Reg, Op0IsKill);  in selectBitCast()  local
4767     unsigned ResultReg = emitASR_ri(VT, VT, Src0Reg, Src0IsKill, Lg2);  in selectSDiv()  local
4801   unsigned ResultReg;  in selectSDiv()  local