1756   SDValue TVal = Sel.getOperand(2);  in LowerXOR()  local
1765   ConstantSDNode *CTVal = dyn_cast<ConstantSDNode>(TVal);  in LowerXOR()
1774     std::swap(TVal, FVal);  in LowerXOR()
1785     TVal = DAG.getNode(ISD::XOR, dl, Other.getValueType(), Other,  in LowerXOR()
1788     return DAG.getNode(AArch64ISD::CSEL, dl, Sel.getValueType(), FVal, TVal,  in LowerXOR()
1843   SDValue TVal = DAG.getConstant(1, dl, MVT::i32);  in LowerXALUO()  local
1850   Overflow = DAG.getNode(AArch64ISD::CSEL, dl, MVT::i32, FVal, TVal,  in LowerXALUO()
3864   SDValue TVal = DAG.getConstant(1, dl, VT);  in LowerSETCC()  local
3888     return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CCVal, Cmp);  in LowerSETCC()
3907     return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CC1Val, Cmp);  in LowerSETCC()
3917         DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp);  in LowerSETCC()
3920     return DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp);  in LowerSETCC()
3925                                               SDValue RHS, SDValue TVal,  in LowerSELECT_CC()  argument
3957     ConstantSDNode *CTVal = dyn_cast<ConstantSDNode>(TVal);  in LowerSELECT_CC()
3960       std::swap(TVal, FVal);  in LowerSELECT_CC()
3964       std::swap(TVal, FVal);  in LowerSELECT_CC()
3967     } else if (TVal.getOpcode() == ISD::XOR) {  in LowerSELECT_CC()
3970       if (isAllOnesConstant(TVal.getOperand(1))) {  in LowerSELECT_CC()
3971         std::swap(TVal, FVal);  in LowerSELECT_CC()
3975     } else if (TVal.getOpcode() == ISD::SUB) {  in LowerSELECT_CC()
3978       if (isNullConstant(TVal.getOperand(0))) {  in LowerSELECT_CC()
3979         std::swap(TVal, FVal);  in LowerSELECT_CC()
3995       } else if (TVal.getValueType() == MVT::i32) {  in LowerSELECT_CC()
4022         std::swap(TVal, FVal);  in LowerSELECT_CC()
4030         FVal = TVal;  in LowerSELECT_CC()
4037     EVT VT = TVal.getValueType();  in LowerSELECT_CC()
4038     return DAG.getNode(Opcode, dl, VT, TVal, FVal, CCVal, Cmp);  in LowerSELECT_CC()
4044   EVT VT = TVal.getValueType();  in LowerSELECT_CC()
4052   SDValue CS1 = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp);  in LowerSELECT_CC()
4058     return DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp);  in LowerSELECT_CC()
4070   SDValue TVal = Op.getOperand(2);  in LowerSELECT_CC()  local
4073   return LowerSELECT_CC(CC, LHS, RHS, TVal, FVal, DL, DAG);  in LowerSELECT_CC()
4079   SDValue TVal = Op->getOperand(1);  in LowerSELECT()  local
4098     return DAG.getNode(AArch64ISD::CSEL, DL, Op.getValueType(), TVal, FVal,  in LowerSELECT()
4114   return LowerSELECT_CC(CC, LHS, RHS, TVal, FVal, DL, DAG);  in LowerSELECT()