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Lines Matching refs:setTargetDAGCombine

462   setTargetDAGCombine(ISD::OR);  in AArch64TargetLowering()
466 setTargetDAGCombine(ISD::ADD); in AArch64TargetLowering()
467 setTargetDAGCombine(ISD::SUB); in AArch64TargetLowering()
468 setTargetDAGCombine(ISD::SRL); in AArch64TargetLowering()
469 setTargetDAGCombine(ISD::XOR); in AArch64TargetLowering()
470 setTargetDAGCombine(ISD::SINT_TO_FP); in AArch64TargetLowering()
471 setTargetDAGCombine(ISD::UINT_TO_FP); in AArch64TargetLowering()
473 setTargetDAGCombine(ISD::FP_TO_SINT); in AArch64TargetLowering()
474 setTargetDAGCombine(ISD::FP_TO_UINT); in AArch64TargetLowering()
475 setTargetDAGCombine(ISD::FDIV); in AArch64TargetLowering()
477 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in AArch64TargetLowering()
479 setTargetDAGCombine(ISD::ANY_EXTEND); in AArch64TargetLowering()
480 setTargetDAGCombine(ISD::ZERO_EXTEND); in AArch64TargetLowering()
481 setTargetDAGCombine(ISD::SIGN_EXTEND); in AArch64TargetLowering()
482 setTargetDAGCombine(ISD::BITCAST); in AArch64TargetLowering()
483 setTargetDAGCombine(ISD::CONCAT_VECTORS); in AArch64TargetLowering()
484 setTargetDAGCombine(ISD::STORE); in AArch64TargetLowering()
486 setTargetDAGCombine(ISD::LOAD); in AArch64TargetLowering()
488 setTargetDAGCombine(ISD::MUL); in AArch64TargetLowering()
490 setTargetDAGCombine(ISD::SELECT); in AArch64TargetLowering()
491 setTargetDAGCombine(ISD::VSELECT); in AArch64TargetLowering()
493 setTargetDAGCombine(ISD::INTRINSIC_VOID); in AArch64TargetLowering()
494 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in AArch64TargetLowering()
495 setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); in AArch64TargetLowering()
496 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in AArch64TargetLowering()