Lines Matching refs:OpNode
1327 SDNode OpNode>
1329 [(set regtype:$Rd, (OpNode regtype:$Rn, regtype:$Rm, NZCV))]>;
1332 SDNode OpNode>
1334 [(set regtype:$Rd, (OpNode regtype:$Rn, regtype:$Rm, NZCV)),
1340 SDNode OpNode, SDNode OpNode_setflags> {
1341 def Wr : BaseAddSubCarry<isSub, GPR32, asm, OpNode> {
1345 def Xr : BaseAddSubCarry<isSub, GPR64, asm, OpNode> {
1364 SDPatternOperator OpNode>
1367 [(set regtype:$Rd, (OpNode regtype:$Rn, regtype:$Rm))]> {
1380 SDPatternOperator OpNode>
1381 : BaseTwoOperand<{0,0,1,?}, regtype, asm, OpNode> {
1385 multiclass Div<bit isSigned, string asm, SDPatternOperator OpNode> {
1386 def Wr : BaseDiv<isSigned, GPR32, asm, OpNode>,
1390 def Xr : BaseDiv<isSigned, GPR64, asm, OpNode>,
1397 SDPatternOperator OpNode = null_frag>
1398 : BaseTwoOperand<{1,0,?,?}, regtype, asm, OpNode>,
1403 multiclass Shift<bits<2> shift_type, string asm, SDNode OpNode> {
1408 def Xr : BaseShift<shift_type, GPR64, asm, OpNode> {
1412 def : Pat<(i32 (OpNode GPR32:$Rn, i64:$Rm)),
1416 def : Pat<(i32 (OpNode GPR32:$Rn, (i64 (zext GPR32:$Rm)))),
1419 def : Pat<(i32 (OpNode GPR32:$Rn, (i64 (anyext GPR32:$Rm)))),
1422 def : Pat<(i32 (OpNode GPR32:$Rn, (i64 (sext GPR32:$Rm)))),
1472 class MulHi<bits<3> opc, string asm, SDNode OpNode>
1475 [(set GPR64:$Rd, (OpNode GPR64:$Rn, GPR64:$Rm))]>,
1503 SDPatternOperator OpNode, string asm>
1506 [(set GPR32:$Rd, (OpNode GPR32:$Rn, StreamReg:$Rm))]>,
1623 string asm, SDPatternOperator OpNode>
1626 [(set dstRegtype:$Rd, (OpNode srcRegtype:$Rn, immtype:$imm))]>,
1642 SDPatternOperator OpNode>
1644 [(set regtype:$Rd, (OpNode regtype:$Rn, regtype:$Rm))]>,
1649 SDPatternOperator OpNode>
1652 [(set regtype:$Rd, (OpNode regtype:$Rn, shifted_regtype:$Rm))]>,
1677 string asm, SDPatternOperator OpNode>
1681 [(set dstRegtype:$R1, (OpNode src1Regtype:$R2, src2Regtype:$R3))]>,
1734 SDPatternOperator OpNode = null_frag> {
1743 mnemonic, OpNode> {
1748 mnemonic, OpNode> {
1753 def Wrr : BaseAddSubRegPseudo<GPR32, OpNode>;
1754 def Xrr : BaseAddSubRegPseudo<GPR64, OpNode>;
1758 OpNode> {
1762 OpNode> {
1770 arith_extended_reg32<i32>, mnemonic, OpNode> {
1774 arith_extended_reg32to64<i64>, mnemonic, OpNode> {
1814 multiclass AddSubS<bit isSub, string mnemonic, SDNode OpNode, string cmp,
1819 mnemonic, OpNode> {
1823 mnemonic, OpNode> {
1828 def Wrr : BaseAddSubRegPseudo<GPR32, OpNode>;
1829 def Xrr : BaseAddSubRegPseudo<GPR64, OpNode>;
1833 OpNode> {
1837 OpNode> {
1844 arith_extended_reg32<i32>, mnemonic, OpNode> {
1848 arith_extended_reg32<i64>, mnemonic, OpNode> {
2087 multiclass LogicalImm<bits<2> opc, string mnemonic, SDNode OpNode,
2091 [(set GPR32sp:$Rd, (OpNode GPR32:$Rn,
2098 [(set GPR64sp:$Rd, (OpNode GPR64:$Rn,
2111 multiclass LogicalImmS<bits<2> opc, string mnemonic, SDNode OpNode,
2115 [(set GPR32:$Rd, (OpNode GPR32:$Rn, logical_imm32:$imm))]> {
2120 [(set GPR64:$Rd, (OpNode GPR64:$Rn, logical_imm64:$imm))]> {
2133 class BaseLogicalRegPseudo<RegisterClass regtype, SDPatternOperator OpNode>
2135 [(set regtype:$Rd, (OpNode regtype:$Rn, regtype:$Rm))]>,
2140 SDPatternOperator OpNode> {
2142 def Wrr : BaseLogicalRegPseudo<GPR32, OpNode>;
2143 def Xrr : BaseLogicalRegPseudo<GPR64, OpNode>;
2147 [(set GPR32:$Rd, (OpNode GPR32:$Rn,
2152 [(set GPR64:$Rd, (OpNode GPR64:$Rn,
2165 SDPatternOperator OpNode = null_frag> {
2167 def Wrr : BaseLogicalRegPseudo<GPR32, OpNode>;
2168 def Xrr : BaseLogicalRegPseudo<GPR64, OpNode>;
2171 [(set GPR32:$Rd, (OpNode GPR32:$Rn, logical_shifted_reg32:$Rm))]> {
2175 [(set GPR64:$Rd, (OpNode GPR64:$Rn, logical_shifted_reg64:$Rm))]> {
2192 string mnemonic, SDNode OpNode>
2195 [(set NZCV, (OpNode regtype:$Rn, immtype:$imm, (i32 imm:$nzcv),
2218 SDNode OpNode>
2221 [(set NZCV, (OpNode regtype:$Rn, regtype:$Rm, (i32 imm:$nzcv),
2242 multiclass CondComparison<bit op, string mnemonic, SDNode OpNode> {
2244 def Wi : BaseCondComparisonImm<op, GPR32, imm32_0_31, mnemonic, OpNode> {
2247 def Xi : BaseCondComparisonImm<op, GPR64, imm0_31, mnemonic, OpNode> {
2251 def Wr : BaseCondComparisonReg<op, GPR32, mnemonic, OpNode> {
2254 def Xr : BaseCondComparisonReg<op, GPR64, mnemonic, OpNode> {
4145 SDPatternOperator OpNode = null_frag> {
4148 [(OpNode FPR16:$Rn, (f16 FPR16:$Rm)), (implicit NZCV)]> {
4154 [(OpNode (f16 FPR16:$Rn), fpimm0), (implicit NZCV)]> {
4160 [(OpNode FPR32:$Rn, (f32 FPR32:$Rm)), (implicit NZCV)]> {
4165 [(OpNode (f32 FPR32:$Rn), fpimm0), (implicit NZCV)]> {
4170 [(OpNode FPR64:$Rn, (f64 FPR64:$Rm)), (implicit NZCV)]> {
4175 [(OpNode (f64 FPR64:$Rn), fpimm0), (implicit NZCV)]> {
4210 SDPatternOperator OpNode = null_frag> {
4217 [(set NZCV, (OpNode (f32 FPR32:$Rn), (f32 FPR32:$Rm), (i32 imm:$nzcv),
4223 [(set NZCV, (OpNode (f64 FPR64:$Rn), (f64 FPR64:$Rm), (i32 imm:$nzcv),
4362 SDPatternOperator OpNode> {
4365 [(set (v8i8 V64:$Rd), (OpNode (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
4368 [(set (v16i8 V128:$Rd), (OpNode (v16i8 V128:$Rn), (v16i8 V128:$Rm)))]>;
4371 [(set (v4i16 V64:$Rd), (OpNode (v4i16 V64:$Rn), (v4i16 V64:$Rm)))]>;
4374 [(set (v8i16 V128:$Rd), (OpNode (v8i16 V128:$Rn), (v8i16 V128:$Rm)))]>;
4377 [(set (v2i32 V64:$Rd), (OpNode (v2i32 V64:$Rn), (v2i32 V64:$Rm)))]>;
4380 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn), (v4i32 V128:$Rm)))]>;
4383 [(set (v2i64 V128:$Rd), (OpNode (v2i64 V128:$Rn), (v2i64 V128:$Rm)))]>;
4388 SDPatternOperator OpNode> {
4391 [(set V64:$Rd, (v8i8 (OpNode (v8i8 V64:$Rn), (v8i8 V64:$Rm))))]>;
4394 [(set V128:$Rd, (v16i8 (OpNode (v16i8 V128:$Rn), (v16i8 V128:$Rm))))]>;
4397 [(set V64:$Rd, (v4i16 (OpNode (v4i16 V64:$Rn), (v4i16 V64:$Rm))))]>;
4400 [(set V128:$Rd, (v8i16 (OpNode (v8i16 V128:$Rn), (v8i16 V128:$Rm))))]>;
4403 [(set V64:$Rd, (v2i32 (OpNode (v2i32 V64:$Rn), (v2i32 V64:$Rm))))]>;
4406 [(set V128:$Rd, (v4i32 (OpNode (v4i32 V128:$Rn), (v4i32 V128:$Rm))))]>;
4410 SDPatternOperator OpNode> {
4414 (OpNode (v8i8 V64:$Rd), (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
4418 (OpNode (v16i8 V128:$Rd), (v16i8 V128:$Rn), (v16i8 V128:$Rm)))]>;
4422 (OpNode (v4i16 V64:$Rd), (v4i16 V64:$Rn), (v4i16 V64:$Rm)))]>;
4426 (OpNode (v8i16 V128:$Rd), (v8i16 V128:$Rn), (v8i16 V128:$Rm)))]>;
4430 (OpNode (v2i32 V64:$Rd), (v2i32 V64:$Rn), (v2i32 V64:$Rm)))]>;
4434 (OpNode (v4i32 V128:$Rd), (v4i32 V128:$Rn), (v4i32 V128:$Rm)))]>;
4439 SDPatternOperator OpNode> {
4442 [(set (v8i8 V64:$Rd), (OpNode (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
4446 (OpNode (v16i8 V128:$Rn), (v16i8 V128:$Rm)))]>;
4451 string asm, SDPatternOperator OpNode> {
4455 [(set (v4f16 V64:$Rd), (OpNode (v4f16 V64:$Rn), (v4f16 V64:$Rm)))]>;
4458 [(set (v8f16 V128:$Rd), (OpNode (v8f16 V128:$Rn), (v8f16 V128:$Rm)))]>;
4462 [(set (v2f32 V64:$Rd), (OpNode (v2f32 V64:$Rn), (v2f32 V64:$Rm)))]>;
4465 [(set (v4f32 V128:$Rd), (OpNode (v4f32 V128:$Rn), (v4f32 V128:$Rm)))]>;
4468 [(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (v2f64 V128:$Rm)))]>;
4473 SDPatternOperator OpNode> {
4477 [(set (v4i16 V64:$Rd), (OpNode (v4f16 V64:$Rn), (v4f16 V64:$Rm)))]>;
4480 [(set (v8i16 V128:$Rd), (OpNode (v8f16 V128:$Rn), (v8f16 V128:$Rm)))]>;
4484 [(set (v2i32 V64:$Rd), (OpNode (v2f32 V64:$Rn), (v2f32 V64:$Rm)))]>;
4487 [(set (v4i32 V128:$Rd), (OpNode (v4f32 V128:$Rn), (v4f32 V128:$Rm)))]>;
4490 [(set (v2i64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (v2f64 V128:$Rm)))]>;
4494 string asm, SDPatternOperator OpNode> {
4499 (OpNode (v4f16 V64:$Rd), (v4f16 V64:$Rn), (v4f16 V64:$Rm)))]>;
4503 (OpNode (v8f16 V128:$Rd), (v8f16 V128:$Rn), (v8f16 V128:$Rm)))]>;
4508 (OpNode (v2f32 V64:$Rd), (v2f32 V64:$Rn), (v2f32 V64:$Rm)))]>;
4512 (OpNode (v4f32 V128:$Rd), (v4f32 V128:$Rn), (v4f32 V128:$Rm)))]>;
4516 (OpNode (v2f64 V128:$Rd), (v2f64 V128:$Rn), (v2f64 V128:$Rm)))]>;
4521 SDPatternOperator OpNode> {
4524 [(set (v4i16 V64:$Rd), (OpNode (v4i16 V64:$Rn), (v4i16 V64:$Rm)))]>;
4527 [(set (v8i16 V128:$Rd), (OpNode (v8i16 V128:$Rn), (v8i16 V128:$Rm)))]>;
4530 [(set (v2i32 V64:$Rd), (OpNode (v2i32 V64:$Rn), (v2i32 V64:$Rm)))]>;
4533 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn), (v4i32 V128:$Rm)))]>;
4538 SDPatternOperator OpNode = null_frag> {
4541 [(set (v8i8 V64:$Rd), (OpNode V64:$Rn, V64:$Rm))]>;
4544 [(set (v16i8 V128:$Rd), (OpNode V128:$Rn, V128:$Rm))]>;
4546 def : Pat<(v4i16 (OpNode V64:$LHS, V64:$RHS)),
4548 def : Pat<(v2i32 (OpNode V64:$LHS, V64:$RHS)),
4550 def : Pat<(v1i64 (OpNode V64:$LHS, V64:$RHS)),
4553 def : Pat<(v8i16 (OpNode V128:$LHS, V128:$RHS)),
4555 def : Pat<(v4i32 (OpNode V128:$LHS, V128:$RHS)),
4557 def : Pat<(v2i64 (OpNode V128:$LHS, V128:$RHS)),
4562 string asm, SDPatternOperator OpNode> {
4566 (OpNode (v8i8 V64:$Rd), (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
4570 (OpNode (v16i8 V128:$Rd), (v16i8 V128:$Rn),
4573 def : Pat<(v4i16 (OpNode (v4i16 V64:$LHS), (v4i16 V64:$MHS),
4577 def : Pat<(v2i32 (OpNode (v2i32 V64:$LHS), (v2i32 V64:$MHS),
4581 def : Pat<(v1i64 (OpNode (v1i64 V64:$LHS), (v1i64 V64:$MHS),
4586 def : Pat<(v8i16 (OpNode (v8i16 V128:$LHS), (v8i16 V128:$MHS),
4590 def : Pat<(v4i32 (OpNode (v4i32 V128:$LHS), (v4i32 V128:$MHS),
4594 def : Pat<(v2i64 (OpNode (v2i64 V128:$LHS), (v2i64 V128:$MHS),
4656 SDPatternOperator OpNode> {
4659 [(set (v8i8 V64:$Rd), (OpNode (v8i8 V64:$Rn)))]>;
4662 [(set (v16i8 V128:$Rd), (OpNode (v16i8 V128:$Rn)))]>;
4665 [(set (v4i16 V64:$Rd), (OpNode (v4i16 V64:$Rn)))]>;
4668 [(set (v8i16 V128:$Rd), (OpNode (v8i16 V128:$Rn)))]>;
4671 [(set (v2i32 V64:$Rd), (OpNode (v2i32 V64:$Rn)))]>;
4674 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn)))]>;
4714 SDPatternOperator OpNode> {
4717 [(set (v4i16 V64:$Rd), (OpNode (v8i8 V64:$Rn)))]>;
4720 [(set (v8i16 V128:$Rd), (OpNode (v16i8 V128:$Rn)))]>;
4723 [(set (v2i32 V64:$Rd), (OpNode (v4i16 V64:$Rn)))]>;
4726 [(set (v4i32 V128:$Rd), (OpNode (v8i16 V128:$Rn)))]>;
4729 [(set (v1i64 V64:$Rd), (OpNode (v2i32 V64:$Rn)))]>;
4732 [(set (v2i64 V128:$Rd), (OpNode (v4i32 V128:$Rn)))]>;
4736 SDPatternOperator OpNode> {
4739 [(set (v4i16 V64:$dst), (OpNode (v4i16 V64:$Rd),
4743 [(set (v8i16 V128:$dst), (OpNode (v8i16 V128:$Rd),
4747 [(set (v2i32 V64:$dst), (OpNode (v2i32 V64:$Rd),
4751 [(set (v4i32 V128:$dst), (OpNode (v4i32 V128:$Rd),
4755 [(set (v1i64 V64:$dst), (OpNode (v1i64 V64:$Rd),
4759 [(set (v2i64 V128:$dst), (OpNode (v2i64 V128:$Rd),
4765 SDPatternOperator OpNode> {
4768 [(set (v8i8 V64:$dst), (OpNode (v8i8 V64:$Rd), (v8i8 V64:$Rn)))]>;
4771 [(set (v16i8 V128:$dst), (OpNode (v16i8 V128:$Rd), (v16i8 V128:$Rn)))]>;
4774 [(set (v4i16 V64:$dst), (OpNode (v4i16 V64:$Rd), (v4i16 V64:$Rn)))]>;
4777 [(set (v8i16 V128:$dst), (OpNode (v8i16 V128:$Rd), (v8i16 V128:$Rn)))]>;
4780 [(set (v2i32 V64:$dst), (OpNode (v2i32 V64:$Rd), (v2i32 V64:$Rn)))]>;
4783 [(set (v4i32 V128:$dst), (OpNode (v4i32 V128:$Rd), (v4i32 V128:$Rn)))]>;
4786 [(set (v2i64 V128:$dst), (OpNode (v2i64 V128:$Rd), (v2i64 V128:$Rn)))]>;
4790 SDPatternOperator OpNode = null_frag> {
4793 [(set (v8i8 V64:$Rd), (OpNode (v8i8 V64:$Rn)))]>;
4796 [(set (v16i8 V128:$Rd), (OpNode (v16i8 V128:$Rn)))]>;
4799 [(set (v4i16 V64:$Rd), (OpNode (v4i16 V64:$Rn)))]>;
4802 [(set (v8i16 V128:$Rd), (OpNode (v8i16 V128:$Rn)))]>;
4805 [(set (v2i32 V64:$Rd), (OpNode (v2i32 V64:$Rn)))]>;
4808 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn)))]>;
4811 [(set (v2i64 V128:$Rd), (OpNode (v2i64 V128:$Rn)))]>;
4817 SDPatternOperator OpNode> {
4820 [(set (v8i8 V64:$Rd), (OpNode (v8i8 V64:$Rn)))]>;
4823 [(set (v16i8 V128:$Rd), (OpNode (v16i8 V128:$Rn)))]>;
4829 SDPatternOperator OpNode> {
4832 [(set (v8i8 V64:$Rd), (OpNode V64:$Rn))]>;
4835 [(set (v16i8 V128:$Rd), (OpNode V128:$Rn))]>;
4838 [(set (v4i16 V64:$Rd), (OpNode V64:$Rn))]>;
4841 [(set (v8i16 V128:$Rd), (OpNode V128:$Rn))]>;
4847 SDPatternOperator OpNode> {
4851 [(set (v4f16 V64:$Rd), (OpNode (v4f16 V64:$Rn)))]>;
4854 [(set (v8f16 V128:$Rd), (OpNode (v8f16 V128:$Rn)))]>;
4858 [(set (v2f32 V64:$Rd), (OpNode (v2f32 V64:$Rn)))]>;
4861 [(set (v4f32 V128:$Rd), (OpNode (v4f32 V128:$Rn)))]>;
4864 [(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn)))]>;
4869 SDPatternOperator OpNode> {
4872 [(set (v2i32 V64:$Rd), (OpNode (v2i32 V64:$Rn)))]>;
4875 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn)))]>;
4880 SDPatternOperator OpNode> {
4884 [(set (v4i16 V64:$Rd), (OpNode (v4f16 V64:$Rn)))]>;
4887 [(set (v8i16 V128:$Rd), (OpNode (v8f16 V128:$Rn)))]>;
4891 [(set (v2i32 V64:$Rd), (OpNode (v2f32 V64:$Rn)))]>;
4894 [(set (v4i32 V128:$Rd), (OpNode (v4f32 V128:$Rn)))]>;
4897 [(set (v2i64 V128:$Rd), (OpNode (v2f64 V128:$Rn)))]>;
4901 SDPatternOperator OpNode> {
4905 [(set (v4f16 V64:$Rd), (OpNode (v4i16 V64:$Rn)))]>;
4908 [(set (v8f16 V128:$Rd), (OpNode (v8i16 V128:$Rn)))]>;
4912 [(set (v2f32 V64:$Rd), (OpNode (v2i32 V64:$Rn)))]>;
4915 [(set (v4f32 V128:$Rd), (OpNode (v4i32 V128:$Rn)))]>;
4918 [(set (v2f64 V128:$Rd), (OpNode (v2i64 V128:$Rn)))]>;
4967 SDPatternOperator OpNode> {
4970 [(set (v8i8 V64:$Rd), (OpNode (v8i16 V128:$Rn)))]>;
4975 [(set (v4i16 V64:$Rd), (OpNode (v4i32 V128:$Rn)))]>;
4980 [(set (v2i32 V64:$Rd), (OpNode (v2i64 V128:$Rn)))]>;
4984 def : Pat<(concat_vectors (v8i8 V64:$Rd), (OpNode (v8i16 V128:$Rn))),
4987 def : Pat<(concat_vectors (v4i16 V64:$Rd), (OpNode (v4i32 V128:$Rn))),
4990 def : Pat<(concat_vectors (v2i32 V64:$Rd), (OpNode (v2i64 V128:$Rn))),
4998 ValueType sty, SDNode OpNode>
5002 [(set (dty regtype:$Rd), (OpNode (sty regtype:$Rn)))]>,
5022 SDNode OpNode> {
5025 v8i8, v8i8, OpNode>;
5028 v16i8, v16i8, OpNode>;
5031 v4i16, v4i16, OpNode>;
5034 v8i16, v8i16, OpNode>;
5037 v2i32, v2i32, OpNode>;
5040 v4i32, v4i32, OpNode>;
5043 v2i64, v2i64, OpNode>;
5048 string asm, SDNode OpNode> {
5053 v4i16, v4f16, OpNode>;
5056 v8i16, v8f16, OpNode>;
5060 v2i32, v2f32, OpNode>;
5063 v4i32, v4f32, OpNode>;
5066 v2i64, v2f64, OpNode>;
5160 Intrinsic OpNode> {
5163 [(set (v2f32 V64:$Rd), (OpNode (v2f64 V128:$Rn)))]>;
5167 def : Pat<(concat_vectors (v2f32 V64:$Rd), (OpNode (v2f64 V128:$Rn))),
5303 SDPatternOperator OpNode> {
5307 [(set (v4i32 V128:$Rd), (OpNode (v4i16 V64:$Rn), (v4i16 V64:$Rm)))]>;
5311 [(set (v4i32 V128:$Rd), (OpNode (extract_high_v8i16 V128:$Rn),
5316 [(set (v2i64 V128:$Rd), (OpNode (v2i32 V64:$Rn), (v2i32 V64:$Rm)))]>;
5320 [(set (v2i64 V128:$Rd), (OpNode (extract_high_v4i32 V128:$Rn),
5325 SDPatternOperator OpNode = null_frag> {
5330 (zext (v8i8 (OpNode (v8i8 V64:$Rn), (v8i8 V64:$Rm)))))]>;
5335 (zext (v8i8 (OpNode (extract_high_v16i8 V128:$Rn),
5341 (zext (v4i16 (OpNode (v4i16 V64:$Rn), (v4i16 V64:$Rm)))))]>;
5346 (zext (v4i16 (OpNode (extract_high_v8i16 V128:$Rn),
5352 (zext (v2i32 (OpNode (v2i32 V64:$Rn), (v2i32 V64:$Rm)))))]>;
5357 (zext (v2i32 (OpNode (extract_high_v4i32 V128:$Rn),
5363 SDPatternOperator OpNode> {
5369 (zext (v8i8 (OpNode (v8i8 V64:$Rn), (v8i8 V64:$Rm))))))]>;
5375 (zext (v8i8 (OpNode (extract_high_v16i8 V128:$Rn),
5382 (zext (v4i16 (OpNode (v4i16 V64:$Rn), (v4i16 V64:$Rm))))))]>;
5388 (zext (v4i16 (OpNode (extract_high_v8i16 V128:$Rn),
5395 (zext (v2i32 (OpNode (v2i32 V64:$Rn), (v2i32 V64:$Rm))))))]>;
5401 (zext (v2i32 (OpNode (extract_high_v4i32 V128:$Rn),
5406 SDPatternOperator OpNode = null_frag> {
5410 [(set (v8i16 V128:$Rd), (OpNode (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
5414 [(set (v8i16 V128:$Rd), (OpNode (extract_high_v16i8 V128:$Rn),
5419 [(set (v4i32 V128:$Rd), (OpNode (v4i16 V64:$Rn), (v4i16 V64:$Rm)))]>;
5423 [(set (v4i32 V128:$Rd), (OpNode (extract_high_v8i16 V128:$Rn),
5428 [(set (v2i64 V128:$Rd), (OpNode (v2i32 V64:$Rn), (v2i32 V64:$Rm)))]>;
5432 [(set (v2i64 V128:$Rd), (OpNode (extract_high_v4i32 V128:$Rn),
5438 SDPatternOperator OpNode> {
5443 (OpNode (v8i16 V128:$Rd), (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
5448 (OpNode (v8i16 V128:$Rd),
5455 (OpNode (v4i32 V128:$Rd), (v4i16 V64:$Rn), (v4i16 V64:$Rm)))]>;
5460 (OpNode (v4i32 V128:$Rd),
5467 (OpNode (v2i64 V128:$Rd), (v2i32 V64:$Rn), (v2i32 V64:$Rm)))]>;
5472 (OpNode (v2i64 V128:$Rd),
5510 SDPatternOperator OpNode> {
5514 [(set (v8i16 V128:$Rd), (OpNode (v8i16 V128:$Rn), (v8i8 V64:$Rm)))]>;
5518 [(set (v8i16 V128:$Rd), (OpNode (v8i16 V128:$Rn),
5523 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn), (v4i16 V64:$Rm)))]>;
5527 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn),
5532 [(set (v2i64 V128:$Rd), (OpNode (v2i64 V128:$Rn), (v2i32 V64:$Rm)))]>;
5536 [(set (v2i64 V128:$Rd), (OpNode (v2i64 V128:$Rn),
5580 string asm, string kind, SDNode OpNode, ValueType valty>
5584 [(set (valty regtype:$Rd), (OpNode regtype:$Rn, regtype:$Rm))]>,
5603 SDNode OpNode> {
5605 asm, ".8b", OpNode, v8i8>;
5607 asm, ".16b", OpNode, v16i8>;
5609 asm, ".4h", OpNode, v4i16>;
5611 asm, ".8h", OpNode, v8i16>;
5613 asm, ".2s", OpNode, v2i32>;
5615 asm, ".4s", OpNode, v4i32>;
5617 asm, ".2d", OpNode, v2i64>;
5619 def : Pat<(v4f16 (OpNode V64:$Rn, V64:$Rm)),
5621 def : Pat<(v8f16 (OpNode V128:$Rn, V128:$Rm)),
5623 def : Pat<(v2f32 (OpNode V64:$Rn, V64:$Rm)),
5625 def : Pat<(v4f32 (OpNode V128:$Rn, V128:$Rm)),
5627 def : Pat<(v2f64 (OpNode V128:$Rn, V128:$Rm)),
5678 SDPatternOperator OpNode> {
5680 [(set (v1i64 FPR64:$Rd), (OpNode (v1i64 FPR64:$Rn), (v1i64 FPR64:$Rm)))]>;
5684 SDPatternOperator OpNode> {
5686 [(set (v1i64 FPR64:$Rd), (OpNode (v1i64 FPR64:$Rn), (v1i64 FPR64:$Rm)))]>;
5691 def : Pat<(i64 (OpNode (i64 FPR64:$Rn), (i64 FPR64:$Rm))),
5693 def : Pat<(i32 (OpNode (i32 FPR32:$Rn), (i32 FPR32:$Rm))),
5698 SDPatternOperator OpNode> {
5700 [(set FPR32:$Rd, (OpNode FPR32:$Rn, FPR32:$Rm))]>;
5705 SDPatternOperator OpNode = null_frag> {
5715 SDPatternOperator OpNode = null_frag> {
5718 [(set (f64 FPR64:$Rd), (OpNode (f64 FPR64:$Rn), (f64 FPR64:$Rm)))]>;
5720 [(set FPR32:$Rd, (OpNode FPR32:$Rn, FPR32:$Rm))]>;
5723 [(set FPR16:$Rd, (OpNode FPR16:$Rn, FPR16:$Rm))]>;
5727 def : Pat<(v1f64 (OpNode (v1f64 FPR64:$Rn), (v1f64 FPR64:$Rm))),
5732 SDPatternOperator OpNode = null_frag> {
5735 [(set (i64 FPR64:$Rd), (OpNode (f64 FPR64:$Rn), (f64 FPR64:$Rm)))]>;
5737 [(set (i32 FPR32:$Rd), (OpNode (f32 FPR32:$Rn), (f32 FPR32:$Rm)))]>;
5744 def : Pat<(v1i64 (OpNode (v1f64 FPR64:$Rn), (v1f64 FPR64:$Rm))),
5770 SDPatternOperator OpNode = null_frag> {
5777 [(set (i64 FPR64:$Rd), (OpNode (i32 FPR32:$Rn), (i32 FPR32:$Rm)))]>;
5782 SDPatternOperator OpNode = null_frag> {
5792 (OpNode (i64 FPR64:$Rd), (i32 FPR32:$Rn), (i32 FPR32:$Rm)))]>;
5877 SDPatternOperator OpNode> {
5880 def : Pat<(v1i64 (OpNode FPR64:$Rn)),
5885 SDPatternOperator OpNode> {
5901 def : Pat<(v1i64 (OpNode (v1f64 FPR64:$Rn))),
5906 SDPatternOperator OpNode = null_frag> {
5908 [(set (v1i64 FPR64:$Rd), (OpNode (v1i64 FPR64:$Rn)))]>;
5910 def : Pat<(i64 (OpNode (i64 FPR64:$Rn))),
5923 SDPatternOperator OpNode> {
5925 [(set FPR64:$Rd, (OpNode (f64 FPR64:$Rn)))]>;
5927 [(set FPR32:$Rd, (OpNode (f32 FPR32:$Rn)))]>;
5930 [(set FPR16:$Rd, (OpNode (f16 FPR16:$Rn)))]>;
5935 SDPatternOperator OpNode = null_frag> {
5938 [(set (i64 FPR64:$Rd), (OpNode (i64 FPR64:$Rn)))]>;
5940 [(set (i32 FPR32:$Rd), (OpNode (i32 FPR32:$Rn)))]>;
5945 def : Pat<(v1i64 (OpNode (v1i64 FPR64:$Rn))),
5950 Intrinsic OpNode> {
5953 [(set (i64 FPR64:$dst), (OpNode (i64 FPR64:$Rd), (i64 FPR64:$Rn)))]>;
5955 [(set (i32 FPR32:$dst), (OpNode (i32 FPR32:$Rd), (i32 FPR32:$Rn)))]>;
5960 def : Pat<(v1i64 (OpNode (v1i64 FPR64:$Rd), (v1i64 FPR64:$Rn))),
5968 SDPatternOperator OpNode = null_frag> {
5970 [(set (i32 FPR32:$Rd), (OpNode (i64 FPR64:$Rn)))]>;
6117 ValueType elttype, SDNode OpNode>
6122 (OpNode (insreg V128:$Rn), idxtype:$idx))]> {
6671 SDNode OpNode> {
6674 [(set (v4i16 V64:$dst), (OpNode V64:$Rd,
6679 [(set (v8i16 V128:$dst), (OpNode V128:$Rd,
6685 [(set (v2i32 V64:$dst), (OpNode V64:$Rd,
6690 [(set (v4i32 V128:$dst), (OpNode V128:$Rd,
6788 SDPatternOperator OpNode> {
6795 (OpNode (v4f16 V64:$Rn),
6808 (OpNode (v8f16 V128:$Rn),
6822 (OpNode (v2f32 V64:$Rn),
6834 (OpNode (v4f32 V128:$Rn),
6846 (OpNode (v2f64 V128:$Rn),
6858 (OpNode (f16 FPR16Op:$Rn),
6872 (OpNode (f32 FPR32Op:$Rn),
6884 (OpNode (f64 FPR64Op:$Rn),
6893 multiclass SIMDFPIndexedTiedPatterns<string INST, SDPatternOperator OpNode> {
6895 def : Pat<(v2f32 (OpNode (v2f32 V64:$Rd), (v2f32 V64:$Rn),
6900 def : Pat<(v2f32 (OpNode (v2f32 V64:$Rd), (v2f32 V64:$Rn),
6907 def : Pat<(v4f32 (OpNode (v4f32 V128:$Rd), (v4f32 V128:$Rn),
6912 def : Pat<(v4f32 (OpNode (v4f32 V128:$Rd), (v4f32 V128:$Rn),
6918 def : Pat<(v2f64 (OpNode (v2f64 V128:$Rd), (v2f64 V128:$Rn),
6923 def : Pat<(v2f64 (OpNode (v2f64 V128:$Rd), (v2f64 V128:$Rn),
6929 def : Pat<(f32 (OpNode (f32 FPR32:$Rd), (f32 FPR32:$Rn),
6933 def : Pat<(f32 (OpNode (f32 FPR32:$Rd), (f32 FPR32:$Rn),
6939 def : Pat<(f64 (OpNode (f64 FPR64:$Rd), (f64 FPR64:$Rn),
7022 SDPatternOperator OpNode> {
7027 (OpNode (v4i16 V64:$Rn),
7040 (OpNode (v8i16 V128:$Rn),
7053 (OpNode (v2i32 V64:$Rn),
7065 (OpNode (v4i32 V128:$Rn),
7085 (OpNode FPR32Op:$Rn,
7095 SDPatternOperator OpNode> {
7101 (OpNode (v4i16 V64:$Rn),
7114 (OpNode (v8i16 V128:$Rn),
7127 (OpNode (v2i32 V64:$Rn),
7139 (OpNode (v4i32 V128:$Rn),
7148 SDPatternOperator OpNode> {
7153 (OpNode (v4i16 V64:$Rd),(v4i16 V64:$Rn),
7166 (OpNode (v8i16 V128:$Rd), (v8i16 V128:$Rn),
7179 (OpNode (v2i32 V64:$Rd), (v2i32 V64:$Rn),
7191 (OpNode (v4i32 V128:$Rd), (v4i32 V128:$Rn),
7200 SDPatternOperator OpNode> {
7206 (OpNode (v4i16 V64:$Rn),
7219 (OpNode (extract_high_v8i16 V128:$Rn),
7234 (OpNode (v2i32 V64:$Rn),
7246 (OpNode (extract_high_v4i32 V128:$Rn),
7379 SDPatternOperator OpNode> {
7386 (OpNode (v4i16 V64:$Rn),
7399 (OpNode (extract_high_v8i16 V128:$Rn),
7414 (OpNode (v2i32 V64:$Rn),
7426 (OpNode (extract_high_v4i32 V128:$Rn),
7437 SDPatternOperator OpNode> {
7444 (OpNode (v4i32 V128:$Rd), (v4i16 V64:$Rn),
7457 (OpNode (v4i32 V128:$Rd),
7472 (OpNode (v2i64 V128:$Rd), (v2i32 V64:$Rn),
7484 (OpNode (v2i64 V128:$Rd),
7559 SDPatternOperator OpNode> {
7563 (OpNode (i64 FPR64:$Rn), (i32 vecshiftR64:$imm)))]> {
7567 def : Pat<(v1i64 (OpNode (v1i64 FPR64:$Rn), (i32 vecshiftR64:$imm))),
7572 SDPatternOperator OpNode = null_frag> {
7575 [(set (i64 FPR64:$dst), (OpNode (i64 FPR64:$Rd), (i64 FPR64:$Rn),
7580 def : Pat<(v1i64 (OpNode (v1i64 FPR64:$Rd), (v1i64 FPR64:$Rn),
7587 SDPatternOperator OpNode> {
7591 (OpNode (v1i64 FPR64:$Rn), (i32 vecshiftL64:$imm)))]> {
7606 SDPatternOperator OpNode = null_frag> {
7619 [(set (i32 FPR32:$Rd), (OpNode (i64 FPR64:$Rn), vecshiftR32:$imm))]> {
7625 SDPatternOperator OpNode> {
7638 [(set (i32 FPR32:$Rd), (OpNode (i32 FPR32:$Rn), (i32 vecshiftL32:$imm)))]> {
7644 [(set (i64 FPR64:$Rd), (OpNode (i64 FPR64:$Rn), (i32 vecshiftL64:$imm)))]> {
7648 def : Pat<(v1i64 (OpNode (v1i64 FPR64:$Rn), (i32 vecshiftL64:$imm))),
7725 Intrinsic OpNode> {
7730 [(set (v4i16 V64:$Rd), (OpNode (v4f16 V64:$Rn), (i32 imm:$imm)))]> {
7738 [(set (v8i16 V128:$Rd), (OpNode (v8f16 V128:$Rn), (i32 imm:$imm)))]> {
7746 [(set (v2i32 V64:$Rd), (OpNode (v2f32 V64:$Rn), (i32 imm:$imm)))]> {
7754 [(set (v4i32 V128:$Rd), (OpNode (v4f32 V128:$Rn), (i32 imm:$imm)))]> {
7762 [(set (v2i64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (i32 imm:$imm)))]> {
7769 Intrinsic OpNode> {
7774 [(set (v4f16 V64:$Rd), (OpNode (v4i16 V64:$Rn), (i32 imm:$imm)))]> {
7782 [(set (v8f16 V128:$Rd), (OpNode (v8i16 V128:$Rn), (i32 imm:$imm)))]> {
7791 [(set (v2f32 V64:$Rd), (OpNode (v2i32 V64:$Rn), (i32 imm:$imm)))]> {
7799 [(set (v4f32 V128:$Rd), (OpNode (v4i32 V128:$Rn), (i32 imm:$imm)))]> {
7807 [(set (v2f64 V128:$Rd), (OpNode (v2i64 V128:$Rn), (i32 imm:$imm)))]> {
7814 SDPatternOperator OpNode> {
7818 [(set (v8i8 V64:$Rd), (OpNode (v8i16 V128:$Rn), vecshiftR16Narrow:$imm))]> {
7834 [(set (v4i16 V64:$Rd), (OpNode (v4i32 V128:$Rn), vecshiftR32Narrow:$imm))]> {
7850 [(set (v2i32 V64:$Rd), (OpNode (v2i64 V128:$Rn), vecshiftR64Narrow:$imm))]> {
7868 def : Pat<(concat_vectors (v8i8 V64:$Rd),(OpNode (v8i16 V128:$Rn),
7873 def : Pat<(concat_vectors (v4i16 V64:$Rd), (OpNode (v4i32 V128:$Rn),
7878 def : Pat<(concat_vectors (v2i32 V64:$Rd), (OpNode (v2i64 V128:$Rn),
7886 SDPatternOperator OpNode> {
7890 [(set (v8i8 V64:$Rd), (OpNode (v8i8 V64:$Rn),
7899 [(set (v16i8 V128:$Rd), (OpNode (v16i8 V128:$Rn),
7908 [(set (v4i16 V64:$Rd), (OpNode (v4i16 V64:$Rn),
7917 [(set (v8i16 V128:$Rd), (OpNode (v8i16 V128:$Rn),
7926 [(set (v2i32 V64:$Rd), (OpNode (v2i32 V64:$Rn),
7935 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn),
7944 [(set (v2i64 V128:$Rd), (OpNode (v2i64 V128:$Rn),
7952 SDPatternOperator OpNode> {
7956 [(set (v8i8 V64:$Rd), (OpNode (v8i8 V64:$Rn),
7965 [(set (v16i8 V128:$Rd), (OpNode (v16i8 V128:$Rn),
7974 [(set (v4i16 V64:$Rd), (OpNode (v4i16 V64:$Rn),
7983 [(set (v8i16 V128:$Rd), (OpNode (v8i16 V128:$Rn),
7992 [(set (v2i32 V64:$Rd), (OpNode (v2i32 V64:$Rn),
8001 [(set (v4i32 V128:$Rd), (OpNode (v4i32 V128:$Rn),
8010 [(set (v2i64 V128:$Rd), (OpNode (v2i64 V128:$Rn),
8019 SDPatternOperator OpNode = null_frag> {
8023 (OpNode (v8i8 V64:$Rd), (v8i8 V64:$Rn),
8032 (OpNode (v16i8 V128:$Rd), (v16i8 V128:$Rn),
8041 (OpNode (v4i16 V64:$Rd), (v4i16 V64:$Rn),
8050 (OpNode (v8i16 V128:$Rd), (v8i16 V128:$Rn),
8059 (OpNode (v2i32 V64:$Rd), (v2i32 V64:$Rn),
8068 (OpNode (v4i32 V128:$Rd), (v4i32 V128:$Rn),
8077 (OpNode (v2i64 V128:$Rd), (v2i64 V128:$Rn),
8085 SDPatternOperator OpNode = null_frag> {
8090 (OpNode (v8i8 V64:$Rd), (v8i8 V64:$Rn),
8100 (OpNode (v16i8 V128:$Rd), (v16i8 V128:$Rn),
8110 (OpNode (v4i16 V64:$Rd), (v4i16 V64:$Rn),
8120 (OpNode (v8i16 V128:$Rd), (v8i16 V128:$Rn),
8130 (OpNode (v2i32 V64:$Rd), (v2i32 V64:$Rn),
8140 (OpNode (v4i32 V128:$Rd), (v4i32 V128:$Rn),
8150 (OpNode (v2i64 V128:$Rd), (v2i64 V128:$Rn),
8158 SDPatternOperator OpNode> {
8161 [(set (v8i16 V128:$Rd), (OpNode (v8i8 V64:$Rn), vecshiftL8:$imm))]> {
8170 (OpNode (extract_high_v16i8 V128:$Rn), vecshiftL8:$imm))]> {
8177 [(set (v4i32 V128:$Rd), (OpNode (v4i16 V64:$Rn), vecshiftL16:$imm))]> {
8186 (OpNode (extract_high_v8i16 V128:$Rn), vecshiftL16:$imm))]> {
8194 [(set (v2i64 V128:$Rd), (OpNode (v2i32 V64:$Rn), vecshiftL32:$imm))]> {
8203 (OpNode (extract_high_v4i32 V128:$Rn), vecshiftL32:$imm))]> {
9245 class AESInst<bits<4> opc, string asm, Intrinsic OpNode>
9247 [(set (v16i8 V128:$Rd), (OpNode (v16i8 V128:$Rn)))]>;
9249 class AESTiedInst<bits<4> opc, string asm, Intrinsic OpNode>
9253 (OpNode (v16i8 V128:$Rd), (v16i8 V128:$Rn)))]>;
9274 class SHATiedInstQSV<bits<3> opc, string asm, Intrinsic OpNode>
9278 (OpNode (v4i32 FPR128:$Rd), (i32 FPR32:$Rn),
9281 class SHATiedInstVVV<bits<3> opc, string asm, Intrinsic OpNode>
9285 (OpNode (v4i32 V128:$Rd), (v4i32 V128:$Rn),
9288 class SHATiedInstQQV<bits<3> opc, string asm, Intrinsic OpNode>
9292 (OpNode (v4i32 FPR128:$Rd), (v4i32 FPR128:$Rn),
9311 class SHATiedInstVV<bits<4> opc, string asm, Intrinsic OpNode>
9315 (OpNode (v4i32 V128:$Rd), (v4i32 V128:$Rn)))]>;
9317 class SHAInstSS<bits<4> opc, string asm, Intrinsic OpNode>
9319 [(set (i32 FPR32:$Rd), (OpNode (i32 FPR32:$Rn)))]>;