Lines Matching refs:addPass
302 addPass(createAtomicExpandPass(TM)); in addIRPasses()
308 addPass(createCFGSimplificationPass()); in addIRPasses()
315 addPass(createLoopDataPrefetchPass()); in addIRPasses()
321 addPass(createInterleavedAccessPass(TM)); in addIRPasses()
327 addPass(createSeparateConstOffsetFromGEPPass(TM, true)); in addIRPasses()
330 addPass(createEarlyCSEPass()); in addIRPasses()
333 addPass(createLICMPass()); in addIRPasses()
342 addPass(createAArch64PromoteConstantPass()); in addPreISel()
351 addPass(createGlobalMergePass(TM, 4095, OnlyOptimizeForSize)); in addPreISel()
355 addPass(createAArch64AddressTypePromotionPass()); in addPreISel()
361 addPass(createAArch64ISelDag(getAArch64TargetMachine(), getOptLevel())); in addInstSelector()
367 addPass(createAArch64CleanupLocalDynamicTLSPass()); in addInstSelector()
374 addPass(new IRTranslator()); in addIRTranslator()
378 addPass(new RegBankSelect()); in addRegBankSelect()
385 addPass(createAArch64ConditionOptimizerPass()); in addILPOpts()
387 addPass(createAArch64ConditionalCompares()); in addILPOpts()
389 addPass(&MachineCombinerID); in addILPOpts()
391 addPass(&EarlyIfConverterID); in addILPOpts()
393 addPass(createAArch64StorePairSuppressPass()); in addILPOpts()
400 addPass(createAArch64AdvSIMDScalar()); in addPreRegAlloc()
403 addPass(&PeepholeOptimizerID); in addPreRegAlloc()
410 addPass(createAArch64RedundantCopyEliminationPass()); in addPostRegAlloc()
414 addPass(createAArch64DeadRegisterDefinitions()); in addPostRegAlloc()
417 addPass(createAArch64A57FPLoadBalancing()); in addPostRegAlloc()
422 addPass(createAArch64ExpandPseudoPass()); in addPreSched2()
425 addPass(createAArch64LoadStoreOptimizationPass()); in addPreSched2()
430 addPass(createAArch64A53Fix835769()); in addPreEmitPass()
433 addPass(createAArch64BranchRelaxation()); in addPreEmitPass()
436 addPass(createAArch64CollectLOHPass()); in addPreEmitPass()