336     addPass(createGVNPass());  in addEarlyCSEOrGVNPass()
338     addPass(createEarlyCSEPass());  in addEarlyCSEOrGVNPass()
342   addPass(createSeparateConstOffsetFromGEPPass());  in addStraightLineScalarOptimizationPasses()
343   addPass(createSpeculativeExecutionPass());  in addStraightLineScalarOptimizationPasses()
346   addPass(createStraightLineStrengthReducePass());  in addStraightLineScalarOptimizationPasses()
351   addPass(createNaryReassociatePass());  in addStraightLineScalarOptimizationPasses()
354   addPass(createEarlyCSEPass());  in addStraightLineScalarOptimizationPasses()
364   addPass(createAMDGPUAlwaysInlinePass());  in addIRPasses()
365   addPass(createAlwaysInlinerPass());  in addIRPasses()
371   addPass(createBarrierNoopPass());  in addIRPasses()
374   addPass(createAMDGPUOpenCLImageTypeLoweringPass());  in addIRPasses()
378     addPass(createAMDGPUPromoteAlloca(&TM));  in addIRPasses()
381       addPass(createSROAPass());  in addIRPasses()
408     addPass(createLoadStoreVectorizerPass());  in addCodeGenPrepare()
412   addPass(createFlattenCFGPass());  in addPreISel()
417   addPass(createAMDGPUISelDag(getAMDGPUTargetMachine()));  in addInstSelector()
434     addPass(createStructurizeCFGPass());  in addPreISel()
439   addPass(createR600VectorRegMerger(*TM));  in addPreRegAlloc()
443   addPass(createR600EmitClauseMarkers(), false);  in addPreSched2()
445     addPass(&IfConverterID, false);  in addPreSched2()
446   addPass(createR600ClauseMergePass(*TM), false);  in addPreSched2()
450   addPass(createAMDGPUCFGStructurizerPass(), false);  in addPreEmitPass()
451   addPass(createR600ExpandSpecialInstrsPass(*TM), false);  in addPreEmitPass()
452   addPass(&FinalizeMachineBundlesID, false);  in addPreEmitPass()
453   addPass(createR600Packetizer(*TM), false);  in addPreEmitPass()
454   addPass(createR600ControlFlowFinalizer(*TM), false);  in addPreEmitPass()
478   addPass(&AMDGPUAnnotateKernelFeaturesID);  in addPreISel()
479   addPass(createStructurizeCFGPass(true)); // true -> SkipUniformRegions  in addPreISel()
480   addPass(createSinkingPass());  in addPreISel()
481   addPass(createSITypeRewriter());  in addPreISel()
482   addPass(createAMDGPUAnnotateUniformValues());  in addPreISel()
483   addPass(createSIAnnotateControlFlowPass());  in addPreISel()
498   addPass(&SIFoldOperandsID);  in addMachineSSAOptimization()
499   addPass(&DeadMachineInstructionElimID);  in addMachineSSAOptimization()
504   addPass(createSILowerI1CopiesPass());  in addInstSelector()
505   addPass(&SIFixSGPRCopiesID);  in addInstSelector()
511   addPass(new IRTranslator());  in addIRTranslator()
540   addPass(createSIShrinkInstructionsPass());  in addPreRegAlloc()
541   addPass(createSIWholeQuadModePass());  in addPreRegAlloc()
564   addPass(&PostRAHazardRecognizerID);  in addPreEmitPass()
566   addPass(createSIInsertWaitsPass());  in addPreEmitPass()
567   addPass(createSIShrinkInstructionsPass());  in addPreEmitPass()
568   addPass(createSILowerControlFlowPass());  in addPreEmitPass()
569   addPass(createSIDebuggerInsertNopsPass());  in addPreEmitPass()