69   unsigned ScratchRsrcReg = MFI->getScratchRSrcReg();  in emitPrologue()  local
70   assert(ScratchRsrcReg != AMDGPU::NoRegister);  in emitPrologue()
126   if (ScratchRsrcReg == PreloadedPrivateBufferReg) {  in emitPrologue()
155     if (ScratchRsrcReg == TRI->reservedPrivateSegmentBufferReg(MF)) {  in emitPrologue()
166           MRI.replaceRegWith(ScratchRsrcReg, Reg);  in emitPrologue()
167           ScratchRsrcReg = Reg;  in emitPrologue()
168           MFI->setScratchRSrcReg(ScratchRsrcReg);  in emitPrologue()
196               TRI->isSubRegisterEq(ScratchRsrcReg, Reg))  in emitPrologue()
209   assert(!TRI->isSubRegister(ScratchRsrcReg, ScratchWaveOffsetReg));  in emitPrologue()
224       !TRI->isSubRegisterEq(PreloadedPrivateBufferReg, ScratchRsrcReg) &&  in emitPrologue()
227     unsigned Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1);  in emitPrologue()
228     unsigned Rsrc23 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2_sub3);  in emitPrologue()
240     unsigned Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0);  in emitPrologue()
241     unsigned Rsrc1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1);  in emitPrologue()
242     unsigned Rsrc2 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2);  in emitPrologue()
243     unsigned Rsrc3 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3);  in emitPrologue()
249       .addReg(ScratchRsrcReg, RegState::ImplicitDefine);  in emitPrologue()
253       .addReg(ScratchRsrcReg, RegState::ImplicitDefine);  in emitPrologue()
257       .addReg(ScratchRsrcReg, RegState::ImplicitDefine);  in emitPrologue()
261       .addReg(ScratchRsrcReg, RegState::ImplicitDefine);  in emitPrologue()
269     OtherBB.addLiveIn(ScratchRsrcReg);  in emitPrologue()