Lines Matching refs:addRegisterClass
58 addRegisterClass(MVT::i1, &AMDGPU::VReg_1RegClass); in SITargetLowering()
59 addRegisterClass(MVT::i64, &AMDGPU::SReg_64RegClass); in SITargetLowering()
61 addRegisterClass(MVT::i32, &AMDGPU::SReg_32RegClass); in SITargetLowering()
62 addRegisterClass(MVT::f32, &AMDGPU::VGPR_32RegClass); in SITargetLowering()
64 addRegisterClass(MVT::f64, &AMDGPU::VReg_64RegClass); in SITargetLowering()
65 addRegisterClass(MVT::v2i32, &AMDGPU::SReg_64RegClass); in SITargetLowering()
66 addRegisterClass(MVT::v2f32, &AMDGPU::VReg_64RegClass); in SITargetLowering()
68 addRegisterClass(MVT::v2i64, &AMDGPU::SReg_128RegClass); in SITargetLowering()
69 addRegisterClass(MVT::v2f64, &AMDGPU::SReg_128RegClass); in SITargetLowering()
71 addRegisterClass(MVT::v4i32, &AMDGPU::SReg_128RegClass); in SITargetLowering()
72 addRegisterClass(MVT::v4f32, &AMDGPU::VReg_128RegClass); in SITargetLowering()
74 addRegisterClass(MVT::v8i32, &AMDGPU::SReg_256RegClass); in SITargetLowering()
75 addRegisterClass(MVT::v8f32, &AMDGPU::VReg_256RegClass); in SITargetLowering()
77 addRegisterClass(MVT::v16i32, &AMDGPU::SReg_512RegClass); in SITargetLowering()
78 addRegisterClass(MVT::v16f32, &AMDGPU::VReg_512RegClass); in SITargetLowering()