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Lines Matching refs:MIa

1341 bool SIInstrInfo::checkInstOffsetsDoNotOverlap(MachineInstr &MIa,  in checkInstOffsetsDoNotOverlap()  argument
1346 if (getMemOpBaseRegImmOfs(MIa, BaseReg0, Offset0, &RI) && in checkInstOffsetsDoNotOverlap()
1349 if (!MIa.hasOneMemOperand() || !MIb.hasOneMemOperand()) { in checkInstOffsetsDoNotOverlap()
1353 unsigned Width0 = (*MIa.memoperands_begin())->getSize(); in checkInstOffsetsDoNotOverlap()
1364 bool SIInstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr &MIa, in areMemAccessesTriviallyDisjoint() argument
1367 assert((MIa.mayLoad() || MIa.mayStore()) && in areMemAccessesTriviallyDisjoint()
1372 if (MIa.hasUnmodeledSideEffects() || MIb.hasUnmodeledSideEffects()) in areMemAccessesTriviallyDisjoint()
1376 if (MIa.hasOrderedMemoryRef() || MIb.hasOrderedMemoryRef()) in areMemAccessesTriviallyDisjoint()
1384 if (isDS(MIa)) { in areMemAccessesTriviallyDisjoint()
1386 return checkInstOffsetsDoNotOverlap(MIa, MIb); in areMemAccessesTriviallyDisjoint()
1391 if (isMUBUF(MIa) || isMTBUF(MIa)) { in areMemAccessesTriviallyDisjoint()
1393 return checkInstOffsetsDoNotOverlap(MIa, MIb); in areMemAccessesTriviallyDisjoint()
1398 if (isSMRD(MIa)) { in areMemAccessesTriviallyDisjoint()
1400 return checkInstOffsetsDoNotOverlap(MIa, MIb); in areMemAccessesTriviallyDisjoint()
1402 return !isFLAT(MIb) && !isMUBUF(MIa) && !isMTBUF(MIa); in areMemAccessesTriviallyDisjoint()
1405 if (isFLAT(MIa)) { in areMemAccessesTriviallyDisjoint()
1407 return checkInstOffsetsDoNotOverlap(MIa, MIb); in areMemAccessesTriviallyDisjoint()