Lines Matching refs:Src0RC
1189 class getIns32 <RegisterOperand Src0RC, RegisterClass Src1RC, int NumSrcArgs> {
1190 dag ret = !if(!eq(NumSrcArgs, 1), (ins Src0RC:$src0), // VOP1
1191 !if(!eq(NumSrcArgs, 2), (ins Src0RC:$src0, Src1RC:$src1), // VOP2
1196 class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
1208 (ins FPInputMods:$src0_modifiers, Src0RC:$src0,
1212 (ins Src0RC:$src0)
1217 (ins FPInputMods:$src0_modifiers, Src0RC:$src0,
1222 (ins Src0RC:$src0, Src1RC:$src1)
1227 (ins FPInputMods:$src0_modifiers, Src0RC:$src0,
1233 (ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2)
1237 class getInsDPP <RegisterClass Src0RC, RegisterClass Src1RC, int NumSrcArgs,
1247 (ins FPInputMods:$src0_modifiers, Src0RC:$src0,
1252 (ins Src0RC:$src0, dpp_ctrl:$dpp_ctrl, row_mask:$row_mask,
1258 (ins FPInputMods:$src0_modifiers, Src0RC:$src0,
1264 (ins Src0RC:$src0, Src1RC:$src1, dpp_ctrl:$dpp_ctrl,
1270 class getInsSDWA <RegisterClass Src0RC, RegisterClass Src1RC, int NumSrcArgs,
1279 (ins FPInputMods:$src0_fmodifiers, Src0RC:$src0,
1284 (ins IntInputMods:$src0_imodifiers, Src0RC:$src0,
1292 (ins FPInputMods:$src0_fmodifiers, Src0RC:$src0,
1296 (ins FPInputMods:$src0_fmodifiers, Src0RC:$src0,
1304 (ins IntInputMods:$src0_imodifiers, Src0RC:$src0,
1308 (ins IntInputMods:$src0_imodifiers, Src0RC:$src0,