Lines Matching refs:vdata
114 SDTCisVT<1, iAny>, // vdata(VGPR)
2857 (ins regClass:$vdata, u16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc,
2860 opName#" $vdata, $offset, $offen, $idxen, $glc, $addr64, $dfmt,"
3029 (ins rc:$vdata, VReg_64:$vaddr, SReg_128:$srsrc,
3031 name#" $vdata, $vaddr, $srsrc, $soffset addr64$offset$slc", [], 0
3036 (ins rc:$vdata, SReg_128:$srsrc, SCSrc_32:$soffset, offset:$offset,
3038 name#" $vdata, off, $srsrc, $soffset$offset$slc", [], 0
3044 (ins rc:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset,
3046 name#" $vdata, $vaddr, $srsrc, $soffset offen$offset$slc", [], 0
3053 (ins rc:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset,
3055 name#" $vdata, $vaddr, $srsrc, $soffset idxen$offset$slc", [], 0
3062 (ins rc:$vdata, VReg_64:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset,
3064 name#" $vdata, $vaddr, $srsrc, $soffset idxen offen$offset$slc",
3071 let glc = 1, Constraints = "$vdata = $vdata_in",
3076 op, name#"_rtn_addr64", (outs rc:$vdata),
3079 name#" $vdata, $vaddr, $srsrc, $soffset addr64$offset glc$slc",
3080 [(set vt:$vdata,
3086 op, name#"_rtn_offset", (outs rc:$vdata),
3089 name#" $vdata, off, $srsrc, $soffset$offset glc$slc",
3090 [(set vt:$vdata,
3097 op, name#"_rtn_offen", (outs rc:$vdata),
3100 name#" $vdata, $vaddr, $srsrc, $soffset offen$offset glc$slc",
3107 op, name#"_rtn_idxen", (outs rc:$vdata),
3110 name#" $vdata, $vaddr, $srsrc, $soffset idxen$offset glc$slc",
3117 op, name#"_rtn_bothen", (outs rc:$vdata),
3120 name#" $vdata, $vaddr, $srsrc, $soffset idxen offen$offset glc$slc",
3137 defm _OFFSET : MUBUF_m <op, name#"_offset", (outs regClass:$vdata),
3140 name#" $vdata, off, $srsrc, $soffset$offset$glc$slc$tfe",
3141 [(set load_vt:$vdata, (ld (MUBUFOffset v4i32:$srsrc,
3147 defm _OFFEN : MUBUF_m <op, name#"_offen", (outs regClass:$vdata),
3151 name#" $vdata, $vaddr, $srsrc, $soffset offen$offset$glc$slc$tfe", []>;
3155 defm _IDXEN : MUBUF_m <op, name#"_idxen", (outs regClass:$vdata),
3159 name#" $vdata, $vaddr, $srsrc, $soffset idxen$offset$glc$slc$tfe", []>;
3163 defm _BOTHEN : MUBUF_m <op, name#"_bothen", (outs regClass:$vdata),
3166 … name#" $vdata, $vaddr, $srsrc, $soffset idxen offen$offset$glc$slc$tfe", []>;
3170 defm _ADDR64 : MUBUFAddr64_m <op, name#"_addr64", (outs regClass:$vdata),
3174 name#" $vdata, $vaddr, $srsrc, $soffset addr64$offset$glc$slc$tfe",
3175 [(set load_vt:$vdata, (ld (MUBUFAddr64 v4i32:$srsrc,
3188 (ins vdataClass:$vdata, SReg_128:$srsrc, SCSrc_32:$soffset,
3190 name#" $vdata, off, $srsrc, $soffset$offset$glc$slc$tfe",
3191 [(st store_vt:$vdata, (MUBUFOffset v4i32:$srsrc, i32:$soffset,
3197 (ins vdataClass:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc,
3200 name#" $vdata, $vaddr, $srsrc, $soffset offen"#
3206 (ins vdataClass:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc,
3209 name#" $vdata, $vaddr, $srsrc, $soffset idxen$offset$glc$slc$tfe", []>;
3214 … (ins vdataClass:$vdata, VReg_64:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset,
3216 … name#" $vdata, $vaddr, $srsrc, $soffset idxen offen$offset$glc$slc$tfe", []>;
3221 (ins vdataClass:$vdata, VReg_64:$vaddr, SReg_128:$srsrc,
3225 name#" $vdata, $vaddr, $srsrc, $soffset addr64"#
3227 [(st store_vt:$vdata,
3242 vdata = 0, srsrc = 0, slc = 0, tfe = 0, soffset = 0 in {
3384 (outs dst_rc:$vdata),
3388 asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da",
3416 (ins data_rc:$vdata, addr_rc:$vaddr, SReg_256:$srsrc,
3419 asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
3449 (ins data_rc:$vdata, addr_rc:$vaddr, SReg_256:$srsrc,
3457 let Constraints = "$vdst = $vdata";
3508 (outs dst_rc:$vdata),
3512 asm#" $vdata, $vaddr, $srsrc, $ssamp$dmask$unorm$glc$slc$r128$tfe$lwe$da",
3545 (outs dst_rc:$vdata),
3549 asm#" $vdata, $vaddr, $srsrc, $ssamp$dmask$unorm$glc$slc$r128$tfe$lwe$da",