Lines Matching refs:OpcodeIndex
1825 unsigned OpcodeIndex; in SelectVLD() local
1829 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVLD()
1830 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVLD()
1832 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVLD()
1833 case MVT::v1i64: OpcodeIndex = 3; break; in SelectVLD()
1835 case MVT::v16i8: OpcodeIndex = 0; break; in SelectVLD()
1836 case MVT::v8i16: OpcodeIndex = 1; break; in SelectVLD()
1838 case MVT::v4i32: OpcodeIndex = 2; break; in SelectVLD()
1840 case MVT::v2i64: OpcodeIndex = 3; in SelectVLD()
1867 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLD()
1868 QOpcodes0[OpcodeIndex]); in SelectVLD()
1898 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, in SelectVLD()
1916 VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, Ops); in SelectVLD()
1965 unsigned OpcodeIndex; in SelectVST() local
1969 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVST()
1970 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVST()
1972 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVST()
1973 case MVT::v1i64: OpcodeIndex = 3; break; in SelectVST()
1975 case MVT::v16i8: OpcodeIndex = 0; break; in SelectVST()
1976 case MVT::v8i16: OpcodeIndex = 1; break; in SelectVST()
1978 case MVT::v4i32: OpcodeIndex = 2; break; in SelectVST()
1980 case MVT::v2i64: OpcodeIndex = 3; in SelectVST()
2021 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVST()
2022 QOpcodes0[OpcodeIndex]); in SelectVST()
2066 SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, in SelectVST()
2086 SDNode *VStB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, in SelectVST()
2129 unsigned OpcodeIndex; in SelectVLDSTLane() local
2133 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVLDSTLane()
2134 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVLDSTLane()
2136 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVLDSTLane()
2138 case MVT::v8i16: OpcodeIndex = 0; break; in SelectVLDSTLane()
2140 case MVT::v4i32: OpcodeIndex = 1; break; in SelectVLDSTLane()
2190 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLDSTLane()
2191 QOpcodes[OpcodeIndex]); in SelectVLDSTLane()
2244 unsigned OpcodeIndex; in SelectVLDDup() local
2247 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVLDDup()
2248 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVLDDup()
2250 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVLDDup()
2256 unsigned Opc = Opcodes[OpcodeIndex]; in SelectVLDDup()