Lines Matching refs:isUpdating
204 void SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,
212 void SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,
219 void SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating,
226 void SelectVLDDup(SDNode *N, bool isUpdating, unsigned NumVecs,
1808 void ARMDAGToDAGISel::SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs, in SelectVLD() argument
1816 unsigned AddrOpIdx = isUpdating ? 1 : 2; in SelectVLD()
1856 if (isUpdating) in SelectVLD()
1871 if (isUpdating) { in SelectVLD()
1905 if (isUpdating) { in SelectVLD()
1939 if (isUpdating) in SelectVLD()
1944 void ARMDAGToDAGISel::SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs, in SelectVST() argument
1952 unsigned AddrOpIdx = isUpdating ? 1 : 2; in SelectVST()
1986 if (isUpdating) in SelectVST()
2025 if (isUpdating) { in SelectVST()
2075 if (isUpdating) { in SelectVST()
2092 void ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating, in SelectVLDSTLane() argument
2100 unsigned AddrOpIdx = isUpdating ? 1 : 2; in SelectVLDSTLane()
2151 if (isUpdating) in SelectVLDSTLane()
2161 if (isUpdating) { in SelectVLDSTLane()
2209 if (isUpdating) in SelectVLDSTLane()
2214 void ARMDAGToDAGISel::SelectVLDDup(SDNode *N, bool isUpdating, unsigned NumVecs, in SelectVLDDup() argument
2260 if (isUpdating) { in SelectVLDDup()
2277 if (isUpdating) in SelectVLDDup()
2291 if (isUpdating) in SelectVLDDup()