Lines Matching refs:EXTRACT_SUBVECTOR

117   setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Legal);  in addTypeForNEON()
4446   return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DstVT, BitCast,  in CombineVMOVDRRCandidateWithVecOp()
4731     return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i16, Extended,  in lowerCTPOP16BitElements()
4734     SDValue Extracted = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v8i8,  in lowerCTPOP16BitElements()
4773     return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i32, Extended,  in lowerCTPOP32BitElements()
4776     SDValue Extracted = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i16, N2,  in lowerCTPOP32BitElements()
5968           DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,  in ReconstructShuffle()
5974           DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,  in ReconstructShuffle()
5979           DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,  in ReconstructShuffle()
5982           DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,  in ReconstructShuffle()
6794     N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,  in LowerSDIV()
6796     N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,  in LowerSDIV()
6798     N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,  in LowerSDIV()
6800     N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,  in LowerSDIV()
6830     N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,  in LowerUDIV()
6832     N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,  in LowerUDIV()
6834     N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,  in LowerUDIV()
6836     N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,  in LowerUDIV()