Lines Matching refs:b00
1651 : NLdSt<0,0b00,0b0111,op7_4, (outs), (ins AddrMode:$Rn, VecListOneD:$Vd),
1658 : NLdSt<0,0b00,0b1010,op7_4, (outs), (ins AddrMode:$Rn, VecListDPair:$Vd),
1677 def _fixed : NLdSt<0,0b00, 0b0111,op7_4, (outs GPR:$wb),
1685 def _register : NLdSt<0,0b00,0b0111,op7_4, (outs GPR:$wb),
1695 def _fixed : NLdSt<0,0b00,0b1010,op7_4, (outs GPR:$wb),
1703 def _register : NLdSt<0,0b00,0b1010,op7_4, (outs GPR:$wb),
1725 : NLdSt<0, 0b00, 0b0110, op7_4, (outs),
1733 def _fixed : NLdSt<0,0b00,0b0110,op7_4, (outs GPR:$wb),
1741 def _register : NLdSt<0,0b00,0b0110,op7_4, (outs GPR:$wb),
1767 : NLdSt<0, 0b00, 0b0010, op7_4, (outs),
1776 def _fixed : NLdSt<0,0b00,0b0010,op7_4, (outs GPR:$wb),
1784 def _register : NLdSt<0,0b00,0b0010,op7_4, (outs GPR:$wb),
1811 : NLdSt<0, 0b00, op11_8, op7_4, (outs), (ins AddrMode:$Rn, VdTy:$Vd),
1839 def _fixed : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
1847 def _register : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
1856 def _fixed : NLdSt<0, 0b00, 0b0011, op7_4, (outs GPR:$wb),
1864 def _register : NLdSt<0, 0b00, 0b0011, op7_4, (outs GPR:$wb),
1908 : NLdSt<0, 0b00, op11_8, op7_4, (outs),
1926 : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
1966 : NLdSt<0, 0b00, op11_8, op7_4, (outs),
1985 : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
2052 : NLdStLn<1, 0b00, op11_8, op7_4, (outs),
2093 : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb),
2131 : NLdStLn<1, 0b00, op11_8, op7_4, (outs),
2169 : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb),
2204 : NLdStLn<1, 0b00, op11_8, op7_4, (outs),
2239 : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb),
2274 : NLdStLn<1, 0b00, op11_8, op7_4, (outs),
2313 : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb),
3235 def v8i8 : N2V<op24_23, op21_20, 0b00, op17_16, op11_7, 0, op4,
3262 def v16i8 : N2V<op24_23, op21_20, 0b00, op17_16, op11_7, 1, op4,
3297 def v8i8 : N2VDInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3305 def v16i8 : N2VQInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3320 def v8i8 : N2VN<op24_23, op21_20, 0b00, op17_16, op11_7, op6, op4,
3337 def v8i8 : N2VNInt<op24_23, op21_20, 0b00, op17_16, op11_7, op6, op4,
3353 def v8i16 : N2VL<op24_23, 0b00, 0b10, 0b00, op11_7, op6, op4, IIC_VQUNAiD,
3355 def v4i32 : N2VL<op24_23, 0b01, 0b00, 0b00, op11_7, op6, op4, IIC_VQUNAiD,
3357 def v2i64 : N2VL<op24_23, 0b10, 0b00, 0b00, op11_7, op6, op4, IIC_VQUNAiD,
3371 def v8i8 : N3VD<op24, op23, 0b00, op11_8, op4, itinD16,
3382 def v16i8 : N3VQ<op24, op23, 0b00, op11_8, op4, itinQ16,
3485 def v8i8 : N3VDInt<op24, op23, 0b00, op11_8, op4, f, itinD16,
3488 def v16i8 : N3VQInt<op24, op23, 0b00, op11_8, op4, f, itinQ16,
3499 def v8i8 : N3VDIntSh<op24, op23, 0b00, op11_8, op4, f, itinD16,
3502 def v16i8 : N3VQIntSh<op24, op23, 0b00, op11_8, op4, f, itinQ16,
3543 def v8i8 : N3VNInt<op24, op23, 0b00, op11_8, op4,
3561 def v8i16 : N3VL<op24, op23, 0b00, op11_8, op4, itin16,
3585 def v8i16 : N3VLExt<op24, op23, 0b00, op11_8, op4, itin16,
3627 def v8i16 : N3VLInt<op24, op23, 0b00, op11_8, op4, itin16,
3636 def v8i16 : N3VLIntExt<op24, op23, 0b00, op11_8, op4, itin,
3653 def v8i16 : N3VW<op24, op23, 0b00, op11_8, op4,
3672 def v8i8 : N3VDMulOp<op24, op23, 0b00, op11_8, op4, itinD16,
3680 def v16i8 : N3VQMulOp<op24, op23, 0b00, op11_8, op4, itinQ16,
3711 def v8i8 : N3VDIntOp<op24, op23, 0b00, op11_8, op4, itinD,
3719 def v16i8 : N3VQIntOp<op24, op23, 0b00, op11_8, op4, itinQ,
3754 def v8i8 : N3VDInt3<op24, op23, 0b00, op11_8, op4, itinD16,
3757 def v16i8 : N3VQInt3<op24, op23, 0b00, op11_8, op4, itinQ16,
3767 def v8i16 : N3VLMulOp<op24, op23, 0b00, op11_8, op4, itin16, OpcodeStr,
3809 def v8i16 : N3VLInt3<op24, op23, 0b00, op11_8, op4, itin16,
3817 def v8i16 : N3VLIntExtOp<op24, op23, 0b00, op11_8, op4, itin,
3835 def v8i8 : N2VDPLInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3843 def v16i8 : N2VQPLInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3858 def v8i8 : N2VDPLInt2<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3866 def v16i8 : N2VQPLInt2<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
4118 def VADDfd : N3VD<0, 0, 0b00, 0b1101, 0, IIC_VBIND, "vadd", "f32",
4120 def VADDfq : N3VQ<0, 0, 0b00, 0b1101, 0, IIC_VBINQ, "vadd", "f32",
4175 def VMULpd : N3VDInt<1, 0, 0b00, 0b1001, 1, N3RegFrm, IIC_VMULi16D, "vmul",
4177 def VMULpq : N3VQInt<1, 0, 0b00, 0b1001, 1, N3RegFrm, IIC_VMULi16Q, "vmul",
4179 def VMULfd : N3VD<1, 0, 0b00, 0b1101, 1, IIC_VFMULD, "vmul", "f32",
4181 def VMULfq : N3VQ<1, 0, 0b00, 0b1101, 1, IIC_VFMULQ, "vmul", "f32",
4280 def VMULLp8 : N3VLInt<0, 1, 0b00, 0b1110, 0, IIC_VMULi16D, "vmull", "p8",
4300 def VMLAfd : N3VDMulOp<0, 0, 0b00, 0b1101, 1, IIC_VMACD, "vmla", "f32",
4303 def VMLAfq : N3VQMulOp<0, 0, 0b00, 0b1101, 1, IIC_VMACQ, "vmla", "f32",
4616 def VFMAfd : N3VDMulOp<0, 0, 0b00, 0b1100, 1, IIC_VFMACD, "vfma", "f32",
4620 def VFMAfq : N3VQMulOp<0, 0, 0b00, 0b1100, 1, IIC_VFMACQ, "vfma", "f32",
4714 def VCEQfd : N3VD<0,0,0b00,0b1110,0, IIC_VBIND, "vceq", "f32", v2i32, v2f32,
4716 def VCEQfq : N3VQ<0,0,0b00,0b1110,0, IIC_VBINQ, "vceq", "f32", v4i32, v4f32,
4734 def VCGEfd : N3VD<1,0,0b00,0b1110,0, IIC_VBIND, "vcge", "f32", v2i32, v2f32,
4736 def VCGEfq : N3VQ<1,0,0b00,0b1110,0, IIC_VBINQ, "vcge", "f32", v4i32, v4f32,
4776 def VACGEfd : N3VDInt<1, 0, 0b00, 0b1110, 1, N3RegFrm, IIC_VBIND, "vacge",
4778 def VACGEfq : N3VQInt<1, 0, 0b00, 0b1110, 1, N3RegFrm, IIC_VBINQ, "vacge",
4848 def VANDd : N3VDX<0, 0, 0b00, 0b0001, 1, IIC_VBINiD, "vand",
4850 def VANDq : N3VQX<0, 0, 0b00, 0b0001, 1, IIC_VBINiQ, "vand",
4854 def VEORd : N3VDX<1, 0, 0b00, 0b0001, 1, IIC_VBINiD, "veor",
4856 def VEORq : N3VQX<1, 0, 0b00, 0b0001, 1, IIC_VBINiQ, "veor",
4998 def VMVNd : N2VX<0b11, 0b11, 0b00, 0b00, 0b01011, 0, 0,
5002 def VMVNq : N2VX<0b11, 0b11, 0b00, 0b00, 0b01011, 1, 0,
5186 def VMAXfd : N3VDInt<0, 0, 0b00, 0b1111, 0, N3RegFrm, IIC_VBIND,
5189 def VMAXfq : N3VQInt<0, 0, 0b00, 0b1111, 0, N3RegFrm, IIC_VBINQ,
5203 def VMAXNMNDf : N3VDIntnp<0b00110, 0b00, 0b1111, 0, 1,
5207 def VMAXNMNQf : N3VQIntnp<0b00110, 0b00, 0b1111, 1, 1,
5266 def VPADDi8 : N3VDInt<0, 0, 0b00, 0b1011, 1, N3RegFrm, IIC_VSHLiD,
5275 def VPADDf : N3VDInt<1, 0, 0b00, 0b1101, 0, N3RegFrm,
5284 defm VPADDLs : N2VPLInt_QHS<0b11, 0b11, 0b00, 0b00100, 0, "vpaddl", "s",
5286 defm VPADDLu : N2VPLInt_QHS<0b11, 0b11, 0b00, 0b00101, 0, "vpaddl", "u",
5290 defm VPADALs : N2VPLInt2_QHS<0b11, 0b11, 0b00, 0b01100, 0, "vpadal", "s",
5292 defm VPADALu : N2VPLInt2_QHS<0b11, 0b11, 0b00, 0b01101, 0, "vpadal", "u",
5296 def VPMAXs8 : N3VDInt<0, 0, 0b00, 0b1010, 0, N3RegFrm, IIC_VSUBi4D, "vpmax",
5302 def VPMAXu8 : N3VDInt<1, 0, 0b00, 0b1010, 0, N3RegFrm, IIC_VSUBi4D, "vpmax",
5308 def VPMAXf : N3VDInt<1, 0, 0b00, 0b1111, 0, N3RegFrm, IIC_VPBIND, "vpmax",
5315 def VPMINs8 : N3VDInt<0, 0, 0b00, 0b1010, 1, N3RegFrm, IIC_VSUBi4D, "vpmin",
5321 def VPMINu8 : N3VDInt<1, 0, 0b00, 0b1010, 1, N3RegFrm, IIC_VSUBi4D, "vpmin",
5358 def VRECPSfd : N3VDInt<0, 0, 0b00, 0b1111, 1, N3RegFrm,
5361 def VRECPSfq : N3VQInt<0, 0, 0b00, 0b1111, 1, N3RegFrm,
5594 defm VQABS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01110, 0,
5615 def VNEGs8d : VNEGD<0b00, "vneg", "s8", v8i8>;
5618 def VNEGs8q : VNEGQ<0b00, "vneg", "s8", v16i8>;
5650 defm VQNEG : N2VInt_QHS<0b11, 0b11, 0b00, 0b01111, 0,
5657 defm VCLS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01000, 0,
5661 defm VCLZ : N2VInt_QHS<0b11, 0b11, 0b00, 0b01001, 0,
5665 def VCNTd : N2VDInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0,
5668 def VCNTq : N2VQInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0,
5673 def VSWPd : N2VX<0b11, 0b11, 0b00, 0b10, 0b00000, 0, 0,
5677 def VSWPq : N2VX<0b11, 0b11, 0b00, 0b10, 0b00000, 1, 0,
5835 def VGETLNi32 : NVGetLane<{1,1,1,0,0,0,?,1}, 0b1011, 0b00,
5904 def VSETLNi32 : NVSetLane<{1,1,1,0,0,0,?,0}, 0b1011, 0b00, (outs DPR:$V),
5985 def VDUP8d : VDUPD<0b11101100, 0b00, "8", v8i8>;
5987 def VDUP32d : VDUPD<0b11101000, 0b00, "32", v2i32>,
5989 def VDUP8q : VDUPQ<0b11101110, 0b00, "8", v16i8>;
5991 def VDUP32q : VDUPQ<0b11101010, 0b00, "32", v4i32>;
6267 : N2V<0b11, 0b11, op19_18, 0b00, 0b00000, 0, 0, (outs DPR:$Vd),
6272 : N2V<0b11, 0b11, op19_18, 0b00, 0b00000, 1, 0, (outs QPR:$Vd),
6277 def VREV64d8 : VREV64D<0b00, "vrev64", "8", v8i8>;
6282 def VREV64q8 : VREV64Q<0b00, "vrev64", "8", v16i8>;
6290 : N2V<0b11, 0b11, op19_18, 0b00, 0b00001, 0, 0, (outs DPR:$Vd),
6295 : N2V<0b11, 0b11, op19_18, 0b00, 0b00001, 1, 0, (outs QPR:$Vd),
6300 def VREV32d8 : VREV32D<0b00, "vrev32", "8", v8i8>;
6303 def VREV32q8 : VREV32Q<0b00, "vrev32", "8", v16i8>;
6309 : N2V<0b11, 0b11, op19_18, 0b00, 0b00010, 0, 0, (outs DPR:$Vd),
6314 : N2V<0b11, 0b11, op19_18, 0b00, 0b00010, 1, 0, (outs QPR:$Vd),
6319 def VREV16d8 : VREV16D<0b00, "vrev16", "8", v8i8>;
6320 def VREV16q8 : VREV16Q<0b00, "vrev16", "8", v16i8>;
6377 let Inst{9-8} = 0b00;
6393 let Inst{9-8} = 0b00;
6406 def VTRNd8 : N2VDShuffle<0b00, 0b00001, "vtrn", "8">;
6410 def VTRNq8 : N2VQShuffle<0b00, 0b00001, IIC_VPERMQ, "vtrn", "8">;
6416 def VUZPd8 : N2VDShuffle<0b00, 0b00010, "vuzp", "8">;
6422 def VUZPq8 : N2VQShuffle<0b00, 0b00010, IIC_VPERMQ3, "vuzp", "8">;
6428 def VZIPd8 : N2VDShuffle<0b00, 0b00011, "vzip", "8">;
6434 def VZIPq8 : N2VQShuffle<0b00, 0b00011, IIC_VPERMQ3, "vzip", "8">;
6551 : N2VQIntXnp<0b00, 0b00, 0b011, op6, op7, NoItinerary,
6555 : N2VQIntX2np<0b00, 0b00, 0b011, op6, op7, NoItinerary,
6582 def SHA1C : N3SHA3Op<"1c", 0b00100, 0b00, null_frag>;
6586 def SHA256H : N3SHA3Op<"256h", 0b00110, 0b00, int_arm_neon_sha256h>;