Lines Matching refs:Rt
977 def i12 : T2Ii12<(outs target:$Rt), (ins t2addrmode_imm12:$addr), iii,
978 opc, ".w\t$Rt, $addr",
979 [(set target:$Rt, (opnode t2addrmode_imm12:$addr))]> {
980 bits<4> Rt;
988 let Inst{15-12} = Rt;
993 def i8 : T2Ii8 <(outs target:$Rt), (ins t2addrmode_negimm8:$addr), iii,
994 opc, "\t$Rt, $addr",
995 [(set target:$Rt, (opnode t2addrmode_negimm8:$addr))]> {
996 bits<4> Rt;
1005 let Inst{15-12} = Rt;
1015 def s : T2Iso <(outs target:$Rt), (ins t2addrmode_so_reg:$addr), iis,
1016 opc, ".w\t$Rt, $addr",
1017 [(set target:$Rt, (opnode t2addrmode_so_reg:$addr))]> {
1026 bits<4> Rt;
1027 let Inst{15-12} = Rt;
1039 def pci : T2Ipc <(outs target:$Rt), (ins t2ldrlabel:$addr), iii,
1040 opc, ".w\t$Rt, $addr",
1041 [(set target:$Rt, (opnode (ARMWrapper tconstpool:$addr)))]> {
1050 bits<4> Rt;
1051 let Inst{15-12} = Rt{3-0};
1065 def i12 : T2Ii12<(outs), (ins target:$Rt, t2addrmode_imm12:$addr), iii,
1066 opc, ".w\t$Rt, $addr",
1067 [(opnode target:$Rt, t2addrmode_imm12:$addr)]> {
1073 bits<4> Rt;
1074 let Inst{15-12} = Rt;
1082 def i8 : T2Ii8 <(outs), (ins target:$Rt, t2addrmode_negimm8:$addr), iii,
1083 opc, "\t$Rt, $addr",
1084 [(opnode target:$Rt, t2addrmode_negimm8:$addr)]> {
1094 bits<4> Rt;
1095 let Inst{15-12} = Rt;
1102 def s : T2Iso <(outs), (ins target:$Rt, t2addrmode_so_reg:$addr), iis,
1103 opc, ".w\t$Rt, $addr",
1104 [(opnode target:$Rt, t2addrmode_so_reg:$addr)]> {
1111 bits<4> Rt;
1112 let Inst{15-12} = Rt;
1279 def t2LDRDi8 : T2Ii8s4<1, 0, 1, (outs rGPR:$Rt, rGPR:$Rt2),
1281 IIC_iLoad_d_i, "ldrd", "\t$Rt, $Rt2, $addr", "", []>;
1332 def t2LDR_PRE : T2Ipreldst<0, 0b10, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
1335 "ldr", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []>;
1337 def t2LDR_POST : T2Ipostldst<0, 0b10, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
1340 "ldr", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
1342 def t2LDRB_PRE : T2Ipreldst<0, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
1345 "ldrb", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []>;
1347 def t2LDRB_POST : T2Ipostldst<0, 0b00, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
1350 "ldrb", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
1352 def t2LDRH_PRE : T2Ipreldst<0, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
1355 "ldrh", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []>;
1357 def t2LDRH_POST : T2Ipostldst<0, 0b01, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
1360 "ldrh", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
1362 def t2LDRSB_PRE : T2Ipreldst<1, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
1365 "ldrsb", "\t$Rt, $addr!", "$addr.base = $Rn_wb",
1368 def t2LDRSB_POST : T2Ipostldst<1, 0b00, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
1371 "ldrsb", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
1373 def t2LDRSH_PRE : T2Ipreldst<1, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn_wb),
1376 "ldrsh", "\t$Rt, $addr!", "$addr.base = $Rn_wb",
1379 def t2LDRSH_POST : T2Ipostldst<1, 0b01, 1, 0, (outs GPR:$Rt, GPR:$Rn_wb),
1382 "ldrsh", "\t$Rt, $Rn$offset", "$Rn = $Rn_wb", []>;
1388 : T2Ii8<(outs rGPR:$Rt), (ins t2addrmode_posimm8:$addr), ii, opc,
1389 "\t$Rt, $addr", []> {
1390 bits<4> Rt;
1399 let Inst{15-12} = Rt;
1417 bits<4> Rt;
1429 let Inst{15-12} = Rt;
1432 def t2LDA : T2Ildacq<0b1101, 0b10, (outs rGPR:$Rt),
1433 (ins addr_offset_none:$addr), "lda", "\t$Rt, $addr", []>;
1434 def t2LDAB : T2Ildacq<0b1101, 0b00, (outs rGPR:$Rt),
1435 (ins addr_offset_none:$addr), "ldab", "\t$Rt, $addr", []>;
1436 def t2LDAH : T2Ildacq<0b1101, 0b01, (outs rGPR:$Rt),
1437 (ins addr_offset_none:$addr), "ldah", "\t$Rt, $addr", []>;
1449 (ins rGPR:$Rt, rGPR:$Rt2, t2addrmode_imm8s4:$addr),
1450 IIC_iStore_d_r, "strd", "\t$Rt, $Rt2, $addr", "", []>;
1456 (ins GPRnopc:$Rt, t2addrmode_imm8_pre:$addr),
1458 "str", "\t$Rt, $addr!",
1462 (ins rGPR:$Rt, t2addrmode_imm8_pre:$addr),
1464 "strh", "\t$Rt, $addr!",
1468 (ins rGPR:$Rt, t2addrmode_imm8_pre:$addr),
1470 "strb", "\t$Rt, $addr!",
1475 (ins GPRnopc:$Rt, addr_offset_none:$Rn,
1478 "str", "\t$Rt, $Rn$offset",
1481 (post_store GPRnopc:$Rt, addr_offset_none:$Rn,
1485 (ins rGPR:$Rt, addr_offset_none:$Rn,
1488 "strh", "\t$Rt, $Rn$offset",
1491 (post_truncsti16 rGPR:$Rt, addr_offset_none:$Rn,
1495 (ins rGPR:$Rt, addr_offset_none:$Rn,
1498 "strb", "\t$Rt, $Rn$offset",
1501 (post_truncsti8 rGPR:$Rt, addr_offset_none:$Rn,
1512 (ins rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset, pred:$p),
1515 (pre_store rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset))]>;
1517 (ins rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset, pred:$p),
1520 (pre_truncsti8 rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset))]>;
1522 (ins rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset, pred:$p),
1525 (pre_truncsti16 rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset))]>;
1532 : T2Ii8<(outs rGPR:$Rt), (ins t2addrmode_imm8:$addr), ii, opc,
1533 "\t$Rt, $addr", []> {
1543 bits<4> Rt;
1545 let Inst{15-12} = Rt;
1557 def t2LDRD_PRE : T2Ii8s4<1, 1, 1, (outs rGPR:$Rt, rGPR:$Rt2, GPR:$wb),
1559 "ldrd", "\t$Rt, $Rt2, $addr!", "$addr.base = $wb", []> {
1564 def t2LDRD_POST : T2Ii8s4post<0, 1, 1, (outs rGPR:$Rt, rGPR:$Rt2, GPR:$wb),
1566 IIC_iLoad_d_ru, "ldrd", "\t$Rt, $Rt2, $addr$imm",
1571 (ins rGPR:$Rt, rGPR:$Rt2, t2addrmode_imm8s4_pre:$addr),
1572 IIC_iStore_d_ru, "strd", "\t$Rt, $Rt2, $addr!",
1579 (ins rGPR:$Rt, rGPR:$Rt2, addr_offset_none:$addr,
1581 IIC_iStore_d_ru, "strd", "\t$Rt, $Rt2, $addr$imm",
1588 bits<4> Rt;
1599 let Inst{15-12} = Rt;
1602 def t2STL : T2Istrrel<0b10, (outs), (ins rGPR:$Rt, addr_offset_none:$addr),
1603 "stl", "\t$Rt, $addr", []>;
1604 def t2STLB : T2Istrrel<0b00, (outs), (ins rGPR:$Rt, addr_offset_none:$addr),
1605 "stlb", "\t$Rt, $addr", []>;
1606 def t2STLH : T2Istrrel<0b01, (outs), (ins rGPR:$Rt, addr_offset_none:$addr),
1607 "stlh", "\t$Rt, $addr", []>;
3255 bits<4> Rt;
3257 let Inst{15-12} = Rt;
3270 bits<4> Rt;
3273 let Inst{15-12} = Rt;
3277 def t2LDREXB : T2I_ldrex<0b0100, (outs rGPR:$Rt), (ins addr_offset_none:$addr),
3279 "ldrexb", "\t$Rt, $addr", "",
3280 [(set rGPR:$Rt, (ldrex_1 addr_offset_none:$addr))]>,
3282 def t2LDREXH : T2I_ldrex<0b0101, (outs rGPR:$Rt), (ins addr_offset_none:$addr),
3284 "ldrexh", "\t$Rt, $addr", "",
3285 [(set rGPR:$Rt, (ldrex_2 addr_offset_none:$addr))]>,
3287 def t2LDREX : Thumb2I<(outs rGPR:$Rt), (ins t2addrmode_imm0_1020s4:$addr),
3289 "ldrex", "\t$Rt, $addr", "",
3290 [(set rGPR:$Rt, (ldrex_4 t2addrmode_imm0_1020s4:$addr))]>,
3292 bits<4> Rt;
3297 let Inst{15-12} = Rt;
3302 def t2LDREXD : T2I_ldrex<0b0111, (outs rGPR:$Rt, rGPR:$Rt2),
3305 "ldrexd", "\t$Rt, $Rt2, $addr", "",
3311 def t2LDAEXB : T2I_ldrex<0b1100, (outs rGPR:$Rt), (ins addr_offset_none:$addr),
3313 "ldaexb", "\t$Rt, $addr", "",
3314 [(set rGPR:$Rt, (ldaex_1 addr_offset_none:$addr))]>,
3316 def t2LDAEXH : T2I_ldrex<0b1101, (outs rGPR:$Rt), (ins addr_offset_none:$addr),
3318 "ldaexh", "\t$Rt, $addr", "",
3319 [(set rGPR:$Rt, (ldaex_2 addr_offset_none:$addr))]>,
3321 def t2LDAEX : Thumb2I<(outs rGPR:$Rt), (ins addr_offset_none:$addr),
3323 "ldaex", "\t$Rt, $addr", "",
3324 [(set rGPR:$Rt, (ldaex_4 addr_offset_none:$addr))]>,
3326 bits<4> Rt;
3331 let Inst{15-12} = Rt;
3336 def t2LDAEXD : T2I_ldrex<0b1111, (outs rGPR:$Rt, rGPR:$Rt2),
3339 "ldaexd", "\t$Rt, $Rt2, $addr", "",
3351 (ins rGPR:$Rt, addr_offset_none:$addr),
3353 "strexb", "\t$Rd, $Rt, $addr", "",
3355 (strex_1 rGPR:$Rt, addr_offset_none:$addr))]>,
3358 (ins rGPR:$Rt, addr_offset_none:$addr),
3360 "strexh", "\t$Rd, $Rt, $addr", "",
3362 (strex_2 rGPR:$Rt, addr_offset_none:$addr))]>,
3365 def t2STREX : Thumb2I<(outs rGPR:$Rd), (ins rGPR:$Rt,
3368 "strex", "\t$Rd, $Rt, $addr", "",
3370 (strex_4 rGPR:$Rt, t2addrmode_imm0_1020s4:$addr))]>,
3373 bits<4> Rt;
3378 let Inst{15-12} = Rt;
3384 (ins rGPR:$Rt, rGPR:$Rt2, addr_offset_none:$addr),
3386 "strexd", "\t$Rd, $Rt, $Rt2, $addr", "", [],
3393 (ins rGPR:$Rt, addr_offset_none:$addr),
3395 "stlexb", "\t$Rd, $Rt, $addr", "",
3397 (stlex_1 rGPR:$Rt, addr_offset_none:$addr))]>,
3402 (ins rGPR:$Rt, addr_offset_none:$addr),
3404 "stlexh", "\t$Rd, $Rt, $addr", "",
3406 (stlex_2 rGPR:$Rt, addr_offset_none:$addr))]>,
3410 def t2STLEX : Thumb2I<(outs rGPR:$Rd), (ins rGPR:$Rt,
3413 "stlex", "\t$Rd, $Rt, $addr", "",
3415 (stlex_4 rGPR:$Rt, addr_offset_none:$addr))]>,
3418 bits<4> Rt;
3423 let Inst{15-12} = Rt;
3429 (ins rGPR:$Rt, rGPR:$Rt2, addr_offset_none:$addr),
3431 "stlexd", "\t$Rd, $Rt, $Rt2, $addr", "", [],
3456 def : T2Pat<(strex_1 (and GPR:$Rt, 0xff), addr_offset_none:$addr),
3457 (t2STREXB GPR:$Rt, addr_offset_none:$addr)>,
3459 def : T2Pat<(strex_2 (and GPR:$Rt, 0xffff), addr_offset_none:$addr),
3460 (t2STREXH GPR:$Rt, addr_offset_none:$addr)>,
3469 def : T2Pat<(stlex_1 (and GPR:$Rt, 0xff), addr_offset_none:$addr),
3470 (t2STLEXB GPR:$Rt, addr_offset_none:$addr)>,
3472 def : T2Pat<(stlex_2 (and GPR:$Rt, 0xffff), addr_offset_none:$addr),
3473 (t2STLEXH GPR:$Rt, addr_offset_none:$addr)>,
4151 : T2Cop<Op, oops, iops, opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2",
4157 bits<4> Rt;
4164 let Inst{15-12} = Rt;
4174 : T2Cop<Op, oops, iops, opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm", pattern> {
4179 bits<4> Rt;
4185 let Inst{15-12} = Rt;
4195 (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
4197 [(int_arm_mcr imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn,
4200 def : t2InstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm",
4201 (t2MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
4204 (outs), (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
4206 [(int_arm_mcr2 imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn,
4210 def : t2InstAlias<"mcr2${p} $cop, $opc1, $Rt, $CRn, $CRm",
4211 (t2MCR2 p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
4216 (outs GPRwithAPSR:$Rt), (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
4218 def : t2InstAlias<"mrc${p} $cop, $opc1, $Rt, $CRn, $CRm",
4219 (t2MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
4223 (outs GPRwithAPSR:$Rt), (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
4227 def : t2InstAlias<"mrc2${p} $cop, $opc1, $Rt, $CRn, $CRm",
4228 (t2MRC2 GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
4240 (ins p_imm:$cop, imm0_15:$opc1, GPR:$Rt, GPR:$Rt2,
4242 [(int_arm_mcrr imm:$cop, imm:$opc1, GPR:$Rt, GPR:$Rt2,
4245 (ins p_imm:$cop, imm0_15:$opc1, GPR:$Rt, GPR:$Rt2,
4247 [(int_arm_mcrr2 imm:$cop, imm:$opc1, GPR:$Rt,
4253 def t2MRRC : t2MovRRCopro<0b1110, "mrrc", 1, (outs GPR:$Rt, GPR:$Rt2),
4256 def t2MRRC2 : t2MovRRCopro<0b1111, "mrrc2", 1, (outs GPR:$Rt, GPR:$Rt2),
4345 : T2I<(outs rGPR:$Rt), (ins GPRnopc:$Rn), NoItinerary, asm, "\t$Rt, $Rn",
4348 bits<4> Rt;
4353 let Inst{11-8} = Rt;
4546 def : t2InstAlias<"ldr${p} $Rt, $addr",
4547 (t2LDRi12 GPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
4548 def : t2InstAlias<"ldrb${p} $Rt, $addr",
4549 (t2LDRBi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
4550 def : t2InstAlias<"ldrh${p} $Rt, $addr",
4551 (t2LDRHi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
4552 def : t2InstAlias<"ldrsb${p} $Rt, $addr",
4553 (t2LDRSBi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
4554 def : t2InstAlias<"ldrsh${p} $Rt, $addr",
4555 (t2LDRSHi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
4557 def : t2InstAlias<"ldr${p} $Rt, $addr",
4558 (t2LDRs GPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
4559 def : t2InstAlias<"ldrb${p} $Rt, $addr",
4560 (t2LDRBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
4561 def : t2InstAlias<"ldrh${p} $Rt, $addr",
4562 (t2LDRHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
4563 def : t2InstAlias<"ldrsb${p} $Rt, $addr",
4564 (t2LDRSBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
4565 def : t2InstAlias<"ldrsh${p} $Rt, $addr",
4566 (t2LDRSHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
4568 def : t2InstAlias<"ldr${p} $Rt, $addr",
4569 (t2LDRpci GPRnopc:$Rt, t2ldrlabel:$addr, pred:$p)>;
4570 def : t2InstAlias<"ldrb${p} $Rt, $addr",
4571 (t2LDRBpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p)>;
4572 def : t2InstAlias<"ldrh${p} $Rt, $addr",
4573 (t2LDRHpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p)>;
4574 def : t2InstAlias<"ldrsb${p} $Rt, $addr",
4575 (t2LDRSBpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p)>;
4576 def : t2InstAlias<"ldrsh${p} $Rt, $addr",
4577 (t2LDRSHpci rGPR:$Rt, t2ldrlabel:$addr, pred:$p)>;
4656 def : t2InstAlias<"str${p} $Rt, $addr",
4657 (t2STRi12 GPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
4658 def : t2InstAlias<"strb${p} $Rt, $addr",
4659 (t2STRBi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
4660 def : t2InstAlias<"strh${p} $Rt, $addr",
4661 (t2STRHi12 rGPR:$Rt, t2addrmode_imm12:$addr, pred:$p)>;
4663 def : t2InstAlias<"str${p} $Rt, $addr",
4664 (t2STRs GPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
4665 def : t2InstAlias<"strb${p} $Rt, $addr",
4666 (t2STRBs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
4667 def : t2InstAlias<"strh${p} $Rt, $addr",
4668 (t2STRHs rGPR:$Rt, t2addrmode_so_reg:$addr, pred:$p)>;
4791 def t2LDRpcrel : t2AsmPseudo<"ldr${p} $Rt, $addr",
4792 (ins GPR:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4793 def t2LDRBpcrel : t2AsmPseudo<"ldrb${p} $Rt, $addr",
4794 (ins GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4795 def t2LDRHpcrel : t2AsmPseudo<"ldrh${p} $Rt, $addr",
4796 (ins GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4797 def t2LDRSBpcrel : t2AsmPseudo<"ldrsb${p} $Rt, $addr",
4798 (ins GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4799 def t2LDRSHpcrel : t2AsmPseudo<"ldrsh${p} $Rt, $addr",
4800 (ins GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4802 def : t2InstAlias<"ldr${p}.w $Rt, $addr",
4803 (t2LDRpcrel GPR:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p), 0>;
4804 def : t2InstAlias<"ldrb${p}.w $Rt, $addr",
4805 (t2LDRBpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4806 def : t2InstAlias<"ldrh${p}.w $Rt, $addr",
4807 (t2LDRHpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4808 def : t2InstAlias<"ldrsb${p}.w $Rt, $addr",
4809 (t2LDRSBpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4810 def : t2InstAlias<"ldrsh${p}.w $Rt, $addr",
4811 (t2LDRSHpcrel GPRnopc:$Rt, t2ldr_pcrel_imm12:$addr, pred:$p)>;
4816 // Pseudo instruction ldr Rt, =immediate
4818 : t2AsmPseudo<"ldr${p} $Rt, $immediate",
4819 (ins GPRnopc:$Rt, const_pool_asm_imm:$immediate, pred:$p)>;