Lines Matching refs:RC
82 const TargetRegisterClass *RC = MRI.getRegClass(Reg); in mask() local
83 unsigned ID = RC->getID(); in mask()
205 auto lo = [this] (const BT::RegisterCell &RC, uint16_t RW) in evaluate()
207 assert(RW <= RC.width()); in evaluate()
208 return eXTR(RC, 0, RW); in evaluate()
211 auto hi = [this] (const BT::RegisterCell &RC, uint16_t RW) in evaluate() argument
213 uint16_t W = RC.width(); in evaluate()
215 return eXTR(RC, W-RW, W); in evaluate()
218 auto half = [this] (const BT::RegisterCell &RC, unsigned N) in evaluate() argument
220 assert(N*16+16 <= RC.width()); in evaluate()
221 return eXTR(RC, N*16, N*16+16); in evaluate()
228 RegisterCell RC = eXTR(Rt, I*BW, I*BW+BW).cat(eXTR(Rs, I*BW, I*BW+BW)); in evaluate() local
231 RC.cat(eXTR(Rt, I*BW, I*BW+BW)).cat(eXTR(Rs, I*BW, I*BW+BW)); in evaluate()
234 return RC; in evaluate()
263 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0); in evaluate() local
264 RC.fill(0, L, BT::BitValue::Zero); in evaluate()
265 return rr0(RC, Outputs); in evaluate()
279 RegisterCell RC = RegisterCell(RW).insert(PC, BT::BitMask(0, PW-1)); in evaluate() local
280 RC.fill(PW, RW, BT::BitValue::Zero); in evaluate()
281 return rr0(RC, Outputs); in evaluate()
284 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0); in evaluate() local
286 return rr0(eINS(RC, eXTR(rc(1), 0, W0), 0), Outputs); in evaluate()
300 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); in evaluate() local
301 return rr0(RC, Outputs); in evaluate()
309 RegisterCell RC = eADD(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate() local
310 return rr0(RC, Outputs); in evaluate()
313 RegisterCell RC = eADD(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate() local
314 return rr0(RC, Outputs); in evaluate()
317 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate() local
318 return rr0(RC, Outputs); in evaluate()
322 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0)); in evaluate() local
323 return rr0(RC, Outputs); in evaluate()
327 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0)); in evaluate() local
328 return rr0(RC, Outputs); in evaluate()
332 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
333 return rr0(RC, Outputs); in evaluate()
337 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
338 return rr0(RC, Outputs); in evaluate()
342 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
343 return rr0(RC, Outputs); in evaluate()
346 RegisterCell RC = eADD(rc(1), eSUB(eIMM(im(2), W0), rc(3))); in evaluate() local
347 return rr0(RC, Outputs); in evaluate()
350 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate() local
351 return rr0(RC, Outputs); in evaluate()
354 RegisterCell RC = eADD(rc(1), eADD(rc(2), rc(3))); in evaluate() local
355 return rr0(RC, Outputs); in evaluate()
358 RegisterCell RC = eADD(rc(1), eSUB(rc(2), rc(3))); in evaluate() local
359 return rr0(RC, Outputs); in evaluate()
362 RegisterCell RC = eADD(rc(1), eASL(rc(2), im(3))); in evaluate() local
363 return rr0(RC, Outputs); in evaluate()
376 RegisterCell RC = eSUB(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate() local
377 return rr0(RC, Outputs); in evaluate()
380 RegisterCell RC = eSUB(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate() local
381 return rr0(RC, Outputs); in evaluate()
384 RegisterCell RC = eSUB(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate() local
385 return rr0(RC, Outputs); in evaluate()
388 RegisterCell RC = eSUB(rc(1), eADD(rc(2), rc(3))); in evaluate() local
389 return rr0(RC, Outputs); in evaluate()
411 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
412 return rr0(RC, Outputs); in evaluate()
416 RegisterCell RC = eSUB(rc(1), lo(M, W0)); in evaluate() local
417 return rr0(RC, Outputs); in evaluate()
421 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
422 return rr0(RC, Outputs); in evaluate()
459 RegisterCell RC = eAND(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate() local
460 return rr0(RC, Outputs); in evaluate()
463 RegisterCell RC = eAND(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate() local
464 return rr0(RC, Outputs); in evaluate()
483 RegisterCell RC = eORL(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate() local
484 return rr0(RC, Outputs); in evaluate()
487 RegisterCell RC = eORL(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate() local
488 return rr0(RC, Outputs); in evaluate()
496 RegisterCell RC = eORL(rc(1), eAND(rc(2), eIMM(im(3), W0))); in evaluate() local
497 return rr0(RC, Outputs); in evaluate()
500 RegisterCell RC = eORL(rc(1), eORL(rc(2), eIMM(im(3), W0))); in evaluate() local
501 return rr0(RC, Outputs); in evaluate()
569 RegisterCell RC = eASR(eADD(eASR(XC, im(2)), eIMM(1, 2*W0)), 1); in evaluate() local
570 return rr0(eXTR(RC, 0, W0), Outputs); in evaluate()
578 RegisterCell RC = eLSR(eADD(eASR(XC, S-1), eIMM(1, 2*W0)), 1); in evaluate() local
579 return rr0(eXTR(RC, 0, W0), Outputs); in evaluate()
607 RegisterCell RC = rc(1); in evaluate() local
608 RC[im(2)] = BT::BitValue::Zero; in evaluate()
609 return rr0(RC, Outputs); in evaluate()
612 RegisterCell RC = rc(1); in evaluate() local
613 RC[im(2)] = BT::BitValue::One; in evaluate()
614 return rr0(RC, Outputs); in evaluate()
617 RegisterCell RC = rc(1); in evaluate() local
619 RC[BX] = RC[BX].is(0) ? BT::BitValue::One in evaluate()
620 : RC[BX].is(1) ? BT::BitValue::Zero in evaluate()
622 return rr0(RC, Outputs); in evaluate()
633 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); in evaluate() local
634 return rr0(RC, Outputs); in evaluate()
649 RegisterCell RC = RegisterCell(W0).insert(Ext, BT::BitMask(0, Wd-1)); in evaluate() local
651 return rr0(eZXT(RC, Wd), Outputs); in evaluate()
652 return rr0(eSXT(RC, Wd), Outputs); in evaluate()
687 RegisterCell RC = half(R2, LoH).cat(half(R1, HiH)); in evaluate() local
688 return rr0(RC, Outputs); in evaluate()
695 RegisterCell RC = half(R2, 0).cat(half(R1, 0)).cat(half(R2, 1)) in evaluate() local
697 return rr0(RC, Outputs); in evaluate()
700 RegisterCell RC = shuffle(rc(1), rc(2), 8, false); in evaluate() local
701 return rr0(RC, Outputs); in evaluate()
704 RegisterCell RC = shuffle(rc(1), rc(2), 16, false); in evaluate() local
705 return rr0(RC, Outputs); in evaluate()
708 RegisterCell RC = shuffle(rc(1), rc(2), 8, true); in evaluate() local
709 return rr0(RC, Outputs); in evaluate()
712 RegisterCell RC = shuffle(rc(1), rc(2), 16, true); in evaluate() local
713 return rr0(RC, Outputs); in evaluate()
720 RegisterCell RC(WR); in evaluate() local
724 RC.fill(i*8, i*8+8, F); in evaluate()
726 return rr0(RC, Outputs); in evaluate()
756 RegisterCell RC = eSXT(rc(1).cat(eIMM(0, W1)), W1); in evaluate() local
757 return rr0(RC, Outputs); in evaluate()
805 RegisterCell RC(W0); in evaluate() local
806 RC.fill(0, W0, (All1 ? BT::BitValue::One : BT::BitValue::Zero)); in evaluate()
807 return rr0(RC, Outputs); in evaluate()
822 RegisterCell RC(W0); in evaluate() local
823 RC.fill(0, W0, (Has1 ? BT::BitValue::One : BT::BitValue::Zero)); in evaluate()
824 return rr0(RC, Outputs); in evaluate()