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Lines Matching refs:W0

241   uint16_t W0 = (Reg[0].Reg != 0) ? getRegBitWidth(Reg[0]) : 0;  in evaluate()  local
253 return rr0(eIMM(im(1), W0), Outputs); in evaluate()
255 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::Zero), Outputs); in evaluate()
257 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::One), Outputs); in evaluate()
263 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0); in evaluate()
275 uint16_t RW = W0; in evaluate()
284 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0); in evaluate()
285 W0 = 8; // XXX Pred size in evaluate()
286 return rr0(eINS(RC, eXTR(rc(1), 0, W0), 0), Outputs); in evaluate()
298 assert(W0 == 64 && W1 == 32); in evaluate()
299 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); in evaluate()
307 return rr0(eADD(rc(1), eIMM(im(2), W0)), Outputs); in evaluate()
309 RegisterCell RC = eADD(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate()
313 RegisterCell RC = eADD(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate()
317 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate()
321 RegisterCell M = eMLS(rc(2), eIMM(im(3), W0)); in evaluate()
322 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0)); in evaluate()
327 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0)); in evaluate()
331 RegisterCell M = eMLS(eIMM(im(2), W0), rc(3)); in evaluate()
332 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate()
336 RegisterCell M = eMLS(rc(2), eIMM(im(3), W0)); in evaluate()
337 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate()
342 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate()
346 RegisterCell RC = eADD(rc(1), eSUB(eIMM(im(2), W0), rc(3))); in evaluate()
350 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate()
366 RegisterCell RPC = RegisterCell::self(Reg[0].Reg, W0); in evaluate()
368 return rr0(eADD(RPC, eIMM(im(2), W0)), Outputs); in evaluate()
374 return rr0(eSUB(eIMM(im(1), W0), rc(2)), Outputs); in evaluate()
376 RegisterCell RC = eSUB(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate()
380 RegisterCell RC = eSUB(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate()
384 RegisterCell RC = eSUB(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate()
393 return rr0(eSUB(eIMM(0, W0), rc(1)), Outputs); in evaluate()
397 return rr0(hi(M, W0), Outputs); in evaluate()
407 return rr0(lo(M, W0), Outputs); in evaluate()
410 RegisterCell M = eMLS(rc(2), eIMM(im(3), W0)); in evaluate()
411 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate()
415 RegisterCell M = eMLS(rc(2), eIMM(im(3), W0)); in evaluate()
416 RegisterCell RC = eSUB(rc(1), lo(M, W0)); in evaluate()
421 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate()
425 RegisterCell M = eMLS(rc(1), eIMM(im(2), W0)); in evaluate()
429 RegisterCell M = eMLS(rc(1), eIMM(-im(2), W0)); in evaluate()
433 RegisterCell M = eMLS(rc(1), eIMM(im(2), W0)); in evaluate()
438 return rr0(hi(M, W0), Outputs); in evaluate()
451 return rr0(eAND(rc(1), eIMM(im(2), W0)), Outputs); in evaluate()
459 RegisterCell RC = eAND(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate()
463 RegisterCell RC = eAND(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate()
475 return rr0(eORL(rc(1), eIMM(im(2), W0)), Outputs); in evaluate()
483 RegisterCell RC = eORL(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate()
487 RegisterCell RC = eORL(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate()
496 RegisterCell RC = eORL(rc(1), eAND(rc(2), eIMM(im(3), W0))); in evaluate()
500 RegisterCell RC = eORL(rc(1), eORL(rc(2), eIMM(im(3), W0))); in evaluate()
567 assert(W0 == 32); in evaluate()
568 RegisterCell XC = eSXT(rc(1).cat(eIMM(0, W0)), W0); in evaluate()
569 RegisterCell RC = eASR(eADD(eASR(XC, im(2)), eIMM(1, 2*W0)), 1); in evaluate()
570 return rr0(eXTR(RC, 0, W0), Outputs); in evaluate()
577 RegisterCell XC = eSXT(rc(1).cat(eIMM(0, W0)), W0); in evaluate()
578 RegisterCell RC = eLSR(eADD(eASR(XC, S-1), eIMM(1, 2*W0)), 1); in evaluate()
579 return rr0(eXTR(RC, 0, W0), Outputs); in evaluate()
630 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) in evaluate()
631 .fill(W1+(W1-BX), W0, Zero); in evaluate()
641 assert(Wd <= W0); in evaluate()
643 return rr0(eIMM(0, W0), Outputs); in evaluate()
646 RegisterCell Pad = (Wd+Of > W0) ? rc(1).cat(eIMM(0, Wd+Of-W0)) : rc(1); in evaluate()
649 RegisterCell RC = RegisterCell(W0).insert(Ext, BT::BitMask(0, Wd-1)); in evaluate()
657 assert(Wd < W0 && Of < W0); in evaluate()
659 if (Wd+Of > W0) in evaluate()
660 Wd = W0-Of; in evaluate()
673 assert(W0 % 2 == 0); in evaluate()
674 return rr0(cop(2, W0/2).cat(cop(1, W0/2)), Outputs); in evaluate()
679 assert(W0 == 32); in evaluate()
691 assert(W0 == 64); in evaluate()
716 uint16_t WR = W0; in evaluate()
736 RegisterCell R2 = cop(2, W0); in evaluate()
737 RegisterCell R3 = cop(3, W0); in evaluate()
755 assert(W0 == 64 && W1 == 32); in evaluate()
805 RegisterCell RC(W0); in evaluate()
806 RC.fill(0, W0, (All1 ? BT::BitValue::One : BT::BitValue::Zero)); in evaluate()
822 RegisterCell RC(W0); in evaluate()
823 RC.fill(0, W0, (Has1 ? BT::BitValue::One : BT::BitValue::Zero)); in evaluate()
869 return rr0(RegisterCell(W0).fill(0, W0, F), Outputs); in evaluate()