Lines Matching refs:PredR
258 MachineBasicBlock::iterator UseIt, unsigned PredR, bool Cond);
265 void renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR,
743 MachineBasicBlock::iterator UseIt, unsigned PredR, bool Cond) { in getReachingDefForPred() argument
756 if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(*MI))) in getReachingDefForPred()
766 if (RR.Reg == PredR) { in getReachingDefForPred()
917 unsigned PredR, bool Cond, MachineBasicBlock::iterator First, in renameInRange() argument
926 if (!MI->readsRegister(PredR) || (Cond != HII->isPredicatedTrue(*MI))) in renameInRange()
967 unsigned PredR = MP.getReg(); in predicate() local
968 MachineInstr *DefI = getReachingDefForPred(RT, TfrI, PredR, Cond); in predicate()
985 if (!I->modifiesRegister(PredR, 0)) in predicate()
998 if (PredValid && HII->isPredicated(*MI) && MI->readsRegister(PredR)) in predicate()
1061 renameInRange(RT, RD, PredR, Cond, PastDefIt, TfrIt); in predicate()