Lines Matching refs:b010
193 def A2_addsat : T_ALU32_3op_sfx<"add", ":sat", 0b110, 0b010, 0, 1>;
880 def A2_vaddh : T_VectALU_64 < "vaddh", 0b000, 0b010, 0, 0, 0, 0>;
895 def A2_vavgub : T_VectALU_64 < "vavgub", 0b010, 0b000, 0, 0, 0, 0>;
896 def A2_vavgh : T_VectALU_64 < "vavgh", 0b010, 0b010, 0, 0, 0, 0>;
897 def A2_vavguh : T_VectALU_64 < "vavguh", 0b010, 0b101, 0, 0, 0, 0>;
903 def A2_vavgubr : T_VectALU_64 < "vavgub", 0b010, 0b001, 0, 1, 0, 0>;
904 def A2_vavghr : T_VectALU_64 < "vavgh", 0b010, 0b011, 0, 1, 0, 0>;
905 def A2_vavghcr : T_VectALU_64 < "vavgh", 0b010, 0b100, 0, 0, 1, 0>;
906 def A2_vavguhr : T_VectALU_64 < "vavguh", 0b010, 0b110, 0, 1, 0, 0>;
909 def A2_vavgwcr : T_VectALU_64 < "vavgw", 0b011, 0b010, 0, 0, 1, 0>;
921 def A2_vnavghcr : T_VectALU_64 < "vnavgh", 0b100, 0b010, 1, 0, 1, 1>;
929 def A2_vsubh : T_VectALU_64 < "vsubh", 0b001, 0b010, 0, 0, 0, 1>;
945 def A2_vmaxuh : T_VectALU_64 < "vmaxuh", 0b110, 0b010, 0, 0, 0, 1>;
953 def A2_vminuh : T_VectALU_64 < "vminuh", 0b101, 0b010, 0, 0, 0, 1>;
1234 def C2_cmpgtp : T_cmp64_rr<"cmp.gt", 0b010, 0>;
1304 def A2_orp : T_ALU64_logical<"or", 0b010, 0, 1, 0>;
1385 def C2_xor : T_LOGICAL_2OP<"xor", 0b010, 0, 0>;
2582 def M2_vcmpy_s0_sat_i: T_M2_vmpy <"vcmpyi", 0b010, 0b110, 0, 0, 1>;
2609 def M2_mmpyuh_s0: T_M2_vmpy <"vmpywouh", 0b010, 0b111, 0, 0, 1>;
2615 def M2_mmpyul_s0: T_M2_vmpy <"vmpyweuh", 0b010, 0b101, 0, 0, 1>;
2670 def M2_mpyu_up : T_MType_rr1 <"mpyu", 0b010, 0b001>;
2688 def M2_mpy_up_s1 : T_MType_rr1 <"mpy", 0b101, 0b010, 0>;
2790 def M2_macsip : T_MType_acc_ri <"+= mpyi", 0b010, u8Ext,
2901 def A2_vraddub: T_XTYPE_Vect <"vraddub", 0b010, 0b001, 0>;
2902 def A2_vraddub_acc: T_XTYPE_Vect_acc <"vraddub", 0b010, 0b001, 0>;
2905 def A2_vrsadub: T_XTYPE_Vect <"vrsadub", 0b010, 0b010, 0>;
2906 def A2_vrsadub_acc: T_XTYPE_Vect_acc <"vrsadub", 0b010, 0b010, 0>;
2917 def M2_vrcmpyi_s0c: T_XTYPE_Vect <"vrcmpyi", 0b010, 0b000, 1>;
2919 def M2_vrcmaci_s0c: T_XTYPE_Vect_acc <"vrcmpyi", 0b010, 0b000, 1>;
2928 def M2_vrmpy_s0: T_XTYPE_Vect <"vrmpyh", 0b000, 0b010, 0>;
2929 def M2_vrmac_s0: T_XTYPE_Vect_acc <"vrmpyh", 0b000, 0b010, 0>;
2993 def M2_mmaculs_s0: T_M2_vmpy_acc_sat <"vmpyweuh", 0b010, 0b101, 0, 0>;
2998 def M2_mmacuhs_s0: T_M2_vmpy_acc_sat <"vmpywouh", 0b010, 0b111, 0, 0>;
3004 def M2_vmac2es: T_M2_vmpy_acc <"vmpyeh", 0b001, 0b010, 0, 0>;
3016 def M2_vcmac_s0_sat_i: T_M2_vmpy_acc_sat <"vcmpyi", 0b010, 0b100, 0, 0>;
3137 def M2_dpmpyuu_s0 : T_XTYPE_mpy64 < "mpyu", 0b010, 0b000, 0, 0, 0>;
3142 def M2_dpmpyuu_acc_s0 : T_XTYPE_mpy64_acc < "mpyu", "+", 0b010, 0b000, 0, 0, 0>;
3148 def M2_cmpyr_s0 : T_XTYPE_mpy64 < "cmpyr", 0b000, 0b010, 0, 0, 0>;
3152 def M2_cmacr_s0 : T_XTYPE_mpy64_acc < "cmpyr", "+", 0b000, 0b010, 0, 0, 0>;
3160 def M2_cmpysc_s0 : T_XTYPE_mpy64 < "cmpy", 0b010, 0b110, 1, 0, 1>;
3170 def M2_cmacsc_s0 : T_XTYPE_mpy64_acc < "cmpy", "+", 0b010, 0b110, 1, 0, 1>;
3171 def M2_cnacsc_s0 : T_XTYPE_mpy64_acc < "cmpy", "-", 0b010, 0b111, 1, 0, 1>;
3411 def S2_storerh_pr : T_store_pr<"memh", IntRegs, 0b010, HalfWordAccess>;
3519 defm storerh: ST_Idxd < "memh", "STrih", IntRegs, s11_1Ext, u6_1Ext, 0b010>;
3837 0b010>, NewValueRel;
3921 def S2_vzxtbh : T_S2op_1_di <"vzxtbh", 0b00, 0b010>;
3928 def S2_vsplatrh : T_S2op_1_di <"vsplath", 0b01, 0b010>;
3939 def S2_svsathub : T_S2op_1_ii <"vsathub", 0b10, 0b010>;
3942 def S2_vsatwh : T_S2op_1_id <"vsatwh", 0b00, 0b010>;
3948 def S2_vtrunehb : T_S2op_1_id <"vtrunehb", 0b10, 0b010>;
4037 def S2_asr_i_svw_trun : T_S2op_2_id <"vasrw", 0b110, 0b010>;
4043 def S2_asl_i_r : T_S2op_shift <"asl", 0b000, 0b010, shl>;
4048 def S2_asl_i_r_sat : T_S2op_2_ii <"asl", 0b010, 0b010, 1>;
4051 def S2_asr_i_r_rnd : T_S2op_2_ii <"asr", 0b010, 0b000, 0, 1>;
4141 def S2_ct0 : T_COUNT_LEADING_32<"ct0", 0b010, 0b100>;
4142 def S2_ct1 : T_COUNT_LEADING_32<"ct1", 0b010, 0b101>;
4143 def S2_cl0p : T_COUNT_LEADING_64<"cl0", 0b010, 0b010>;
4144 def S2_cl1p : T_COUNT_LEADING_64<"cl1", 0b010, 0b100>;
4146 def S2_clbp : T_COUNT_LEADING_64<"clb", 0b010, 0b000>;
4200 def S2_togglebit_i : T_SCT_BIT_IMM<"togglebit", 0b010>;
4428 def S2_asl_i_p : S_2OpInstImmI6<"asl", shl, 0b010>;
4743 def HI : REG_IMMED<".h", "HI", 0b0, 0b010, 0b1>;
4744 def HI_L : REG_IMMED<".h", "LO", 0b0, 0b010, 0b1>;
5243 defm _and : xtype_imm_base< opc1, "&= ", OpNode, and, 0b010, minOp>;
5274 def _and : T_shift_reg_acc_p <opc1, "&= ", OpNode, and, 0b010, minOp>;
5319 def S2_shuffeb : T_S3op_64 < "shuffeb", 0b00, 0b010, 0>;
5324 def S2_vtrunewh : T_S3op_64 < "vtrunewh", 0b10, 0b010, 0>;
5447 def S2_asr_r_svw_trun : T_S3op_8<"vasrw", 0b010, 0, 0, 0>;