Lines Matching refs:b100
177 def A2_combine_hh : T_ALU32_combineh<".h", ".h", 0b011, 0b100, 1>;
189 def A2_svsubh : T_ALU32_3op<"vsubh", 0b110, 0b100, 1, 0>;
240 def S2_packhl : T_ALU32_3op <"packhl", 0b101, 0b100, 0, 0>;
843 defm zxtb : ZXTB_base<"zxtb",0b100>, PredNewRel;
888 def A2_vadduhs : T_VectALU_64 < "vadduh", 0b000, 0b100, 1, 0, 0, 0>;
905 def A2_vavghcr : T_VectALU_64 < "vavgh", 0b010, 0b100, 0, 0, 1, 0>;
910 def A2_vavguwr : T_VectALU_64 < "vavguw", 0b011, 0b100, 0, 1, 0, 0>;
914 def A2_vnavgh : T_VectALU_64 < "vnavgh", 0b100, 0b000, 0, 0, 0, 1>;
915 def A2_vnavgw : T_VectALU_64 < "vnavgw", 0b100, 0b011, 0, 0, 0, 1>;
920 def A2_vnavghr : T_VectALU_64 < "vnavgh", 0b100, 0b001, 1, 1, 0, 1>;
921 def A2_vnavghcr : T_VectALU_64 < "vnavgh", 0b100, 0b010, 1, 0, 1, 1>;
922 def A2_vnavgwr : T_VectALU_64 < "vnavgw", 0b100, 0b100, 1, 1, 0, 1>;
923 def A2_vnavgwcr : T_VectALU_64 < "vnavgw", 0b100, 0b110, 1, 0, 1, 1>;
937 def A2_vsubuhs : T_VectALU_64 < "vsubuh", 0b001, 0b100, 1, 0, 0, 1>;
955 def A2_vminuw : T_VectALU_64 < "vminuw", 0b101, 0b100, 0, 0, 0, 1>;
1235 def C2_cmpgtup : T_cmp64_rr<"cmp.gtu", 0b100, 0>;
1305 def A2_xorp : T_ALU64_logical<"xor", 0b100, 0, 1, 0>;
1453 let Inst{27-25} = 0b100;
2063 let Inst{27-25} = 0b100;
2110 let Inst{27-25} = 0b100;
2146 let Inst{27-25} = 0b100;
2589 def M2_vdmpys_s1: T_M2_vmpy <"vdmpy", 0b100, 0b100, 1, 0, 1>;
2590 def M2_vdmpys_s0: T_M2_vmpy <"vdmpy", 0b000, 0b100, 0, 0, 1>;
2593 def M2_vmpy2es_s1: T_M2_vmpy <"vmpyeh", 0b100, 0b110, 1, 0, 1>;
2598 def M2_mmpyh_s1: T_M2_vmpy <"vmpywoh", 0b100, 0b111, 1, 0, 1>;
2604 def M2_mmpyl_s1: T_M2_vmpy <"vmpyweh", 0b100, 0b101, 1, 0, 1>;
2664 def M2_vdmpyrs_s1 : T_MType_dd <"vdmpy", 0b100, 0b000, 1, 1>;
2677 def M2_hmmpyh_rs1 : T_MType_rr2 <"mpy", 0b101, 0b100, 1, 1, ".h">;
2678 def M2_hmmpyl_rs1 : T_MType_rr2 <"mpy", 0b111, 0b100, 1, 1, ".l">;
2803 def M2_accii : T_MType_acc_ri <"+= add", 0b100, s8Ext,
2818 def M2_nacci : T_MType_acc_rr <"-= add", 0b100, 0b001, 0>, ImmRegRel;
2824 def M2_xor_xacc : T_MType_acc_rr < "^= xor", 0b100, 0b011, 0>;
2980 def M2_mmacls_s1: T_M2_vmpy_acc_sat <"vmpyweh", 0b100, 0b101, 1, 0>;
2985 def M2_mmachs_s1: T_M2_vmpy_acc_sat <"vmpywoh", 0b100, 0b111, 1, 0>;
3005 def M2_vmac2es_s1: T_M2_vmpy_acc_sat <"vmpyeh", 0b100, 0b110, 1, 0>;
3010 def M2_vdmacs_s1: T_M2_vmpy_acc_sat <"vdmpy", 0b100, 0b100, 1, 0>;
3011 def M2_vdmacs_s0: T_M2_vmpy_acc_sat <"vdmpy", 0b000, 0b100, 0, 0>;
3015 def M2_vcmac_s0_sat_r: T_M2_vmpy_acc_sat <"vcmpyr", 0b001, 0b100, 0, 0>;
3016 def M2_vcmac_s0_sat_i: T_M2_vmpy_acc_sat <"vcmpyi", 0b010, 0b100, 0, 0>;
3157 def M2_cmpys_s1 : T_XTYPE_mpy64 < "cmpy", 0b100, 0b110, 1, 1, 0>;
3166 def M2_cmacs_s1 : T_XTYPE_mpy64_acc < "cmpy", "+", 0b100, 0b110, 1, 1, 0>;
3167 def M2_cnacs_s1 : T_XTYPE_mpy64_acc < "cmpy", "-", 0b100, 0b111, 1, 1, 0>;
3178 def M2_vmpy2s_s1 : T_XTYPE_mpy64 < "vmpyh", 0b100, 0b101, 1, 1, 0>;
3184 def M2_vmac2s_s1 : T_XTYPE_mpy64_acc < "vmpyh", "+", 0b100, 0b101, 1, 1, 0>;
3412 def S2_storeri_pr : T_store_pr<"memw", IntRegs, 0b100, WordAccess>;
3522 defm storeri: ST_Idxd < "memw", "STriw", IntRegs, s11_2Ext, u6_2Ext, 0b100>;
3677 let Inst{27-25} = 0b100;
3755 let Inst{27-25} = 0b100;
3840 0b100>, NewValueRel;
3920 def S2_vsxthw : T_S2op_1_di <"vsxthw", 0b00, 0b100>;
3943 def S2_vsatwuh : T_S2op_1_id <"vsatwuh", 0b00, 0b100>;
3958 def A2_sath : T_S2op_1_ii <"sath", 0b11, 0b100>;
3965 def S2_vrndpackwh : T_S2op_1_id <"vrndwh", 0b10, 0b100>;
3974 def A2_abs : T_S2op_1_ii <"abs", 0b10, 0b100>;
4083 def A2_notp : T_S2op_3 <"not", 0b10, 0b100>;
4087 def S2_deinterleave : T_S2op_3 <"deinterleave", 0b11, 0b100>;
4094 def S2_vsathub_nopack : T_S2op_3 <"vsathub", 0b00, 0b100>;
4100 def A2_vabsh : T_S2op_3 <"vabsh", 0b01, 0b100>;
4141 def S2_ct0 : T_COUNT_LEADING_32<"ct0", 0b010, 0b100>;
4144 def S2_cl1p : T_COUNT_LEADING_64<"cl1", 0b010, 0b100>;
4145 def S2_clb : T_COUNT_LEADING_32<"clb", 0b000, 0b100>;
5249 defm _xacc : xtype_imm_base< opc1, "^= ", OpNode, xor, 0b100, minOp>;
5273 def _nac : T_shift_reg_acc_p <opc1, "-= ", OpNode, sub, 0b100, minOp>;
5321 def S2_shuffob : T_S3op_64 < "shuffob", 0b00, 0b100, 1>;
5325 def S2_vtrunowh : T_S3op_64 < "vtrunowh", 0b10, 0b100, 0>;
5352 def S2_vsplicerb : T_S3op_2 < "vspliceb", 0b100, 0>;