Lines Matching refs:OpNode
169 multiclass I3<string OpcStr, SDNode OpNode> {
173 [(set Int64Regs:$dst, (OpNode Int64Regs:$a, Int64Regs:$b))]>;
177 [(set Int64Regs:$dst, (OpNode Int64Regs:$a, imm:$b))]>;
181 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, Int32Regs:$b))]>;
185 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, imm:$b))]>;
189 [(set Int16Regs:$dst, (OpNode Int16Regs:$a, Int16Regs:$b))]>;
193 [(set Int16Regs:$dst, (OpNode Int16Regs:$a, (imm):$b))]>;
198 multiclass ADD_SUB_INT_32<string OpcStr, SDNode OpNode> {
202 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, Int32Regs:$b))]>;
206 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, imm:$b))]>;
214 multiclass F3<string OpcStr, SDNode OpNode> {
219 [(set Float64Regs:$dst, (OpNode Float64Regs:$a, Float64Regs:$b))]>,
225 [(set Float64Regs:$dst, (OpNode Float64Regs:$a, fpimm:$b))]>,
231 [(set Float32Regs:$dst, (OpNode Float32Regs:$a, Float32Regs:$b))]>,
237 [(set Float32Regs:$dst, (OpNode Float32Regs:$a, fpimm:$b))]>,
243 [(set Float32Regs:$dst, (OpNode Float32Regs:$a, Float32Regs:$b))]>,
249 [(set Float32Regs:$dst, (OpNode Float32Regs:$a, fpimm:$b))]>,
254 multiclass F3_rn<string OpcStr, SDNode OpNode> {
259 [(set Float64Regs:$dst, (OpNode Float64Regs:$a, Float64Regs:$b))]>,
265 [(set Float64Regs:$dst, (OpNode Float64Regs:$a, fpimm:$b))]>,
271 [(set Float32Regs:$dst, (OpNode Float32Regs:$a, Float32Regs:$b))]>,
277 [(set Float32Regs:$dst, (OpNode Float32Regs:$a, fpimm:$b))]>,
283 [(set Float32Regs:$dst, (OpNode Float32Regs:$a, Float32Regs:$b))]>,
289 [(set Float32Regs:$dst, (OpNode Float32Regs:$a, fpimm:$b))]>,
296 multiclass F2<string OpcStr, SDNode OpNode> {
299 [(set Float64Regs:$dst, (OpNode Float64Regs:$a))]>;
302 [(set Float32Regs:$dst, (OpNode Float32Regs:$a))]>,
306 [(set Float32Regs:$dst, (OpNode Float32Regs:$a))]>;
413 multiclass ADD_SUB_i1<SDNode OpNode> {
416 [(set Int1Regs:$dst, (OpNode Int1Regs:$a, Int1Regs:$b))]>;
419 [(set Int1Regs:$dst, (OpNode Int1Regs:$a, (imm):$b))]>;
964 multiclass BITWISE<string OpcStr, SDNode OpNode> {
968 [(set Int1Regs:$dst, (OpNode Int1Regs:$a, Int1Regs:$b))]>;
972 [(set Int1Regs:$dst, (OpNode Int1Regs:$a, imm:$b))]>;
976 [(set Int16Regs:$dst, (OpNode Int16Regs:$a, Int16Regs:$b))]>;
980 [(set Int16Regs:$dst, (OpNode Int16Regs:$a, imm:$b))]>;
984 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, Int32Regs:$b))]>;
988 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, imm:$b))]>;
992 [(set Int64Regs:$dst, (OpNode Int64Regs:$a, Int64Regs:$b))]>;
996 [(set Int64Regs:$dst, (OpNode Int64Regs:$a, imm:$b))]>;
1021 multiclass SHIFT<string OpcStr, SDNode OpNode> {
1025 [(set Int64Regs:$dst, (OpNode Int64Regs:$a, Int32Regs:$b))]>;
1029 [(set Int64Regs:$dst, (OpNode Int64Regs:$a, (i32 imm:$b)))]>;
1033 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, Int32Regs:$b))]>;
1037 [(set Int32Regs:$dst, (OpNode Int32Regs:$a, (i32 imm:$b)))]>;
1041 [(set Int32Regs:$dst, (OpNode (i32 imm:$a), (i32 imm:$b)))]>;
1045 [(set Int16Regs:$dst, (OpNode Int16Regs:$a, Int32Regs:$b))]>;
1049 [(set Int16Regs:$dst, (OpNode Int16Regs:$a, (i32 imm:$b)))]>;
1481 multiclass ISET_FORMAT<PatFrag OpNode, PatLeaf Mode,
1501 def : Pat<(i1 (OpNode Int16Regs:$a, Int16Regs:$b)),
1503 def : Pat<(i1 (OpNode Int16Regs:$a, imm:$b)),
1505 def : Pat<(i1 (OpNode imm:$a, Int16Regs:$b)),
1508 def : Pat<(i1 (OpNode Int32Regs:$a, Int32Regs:$b)),
1510 def : Pat<(i1 (OpNode Int32Regs:$a, imm:$b)),
1512 def : Pat<(i1 (OpNode imm:$a, Int32Regs:$b)),
1515 def : Pat<(i1 (OpNode Int64Regs:$a, Int64Regs:$b)),
1517 def : Pat<(i1 (OpNode Int64Regs:$a, imm:$b)),
1519 def : Pat<(i1 (OpNode imm:$a, Int64Regs:$b)),
1523 def : Pat<(i32 (OpNode Int16Regs:$a, Int16Regs:$b)),
1525 def : Pat<(i32 (OpNode Int16Regs:$a, imm:$b)),
1527 def : Pat<(i32 (OpNode imm:$a, Int16Regs:$b)),
1530 def : Pat<(i32 (OpNode Int32Regs:$a, Int32Regs:$b)),
1532 def : Pat<(i32 (OpNode Int32Regs:$a, imm:$b)),
1534 def : Pat<(i32 (OpNode imm:$a, Int32Regs:$b)),
1537 def : Pat<(i32 (OpNode Int64Regs:$a, Int64Regs:$b)),
1539 def : Pat<(i32 (OpNode Int64Regs:$a, imm:$b)),
1541 def : Pat<(i32 (OpNode imm:$a, Int64Regs:$b)),
1545 multiclass ISET_FORMAT_SIGNED<PatFrag OpNode, PatLeaf Mode>
1546 : ISET_FORMAT<OpNode, Mode,
1557 multiclass ISET_FORMAT_UNSIGNED<PatFrag OpNode, PatLeaf Mode>
1558 : ISET_FORMAT<OpNode, Mode,
1601 multiclass FSET_FORMAT<PatFrag OpNode, PatLeaf Mode, PatLeaf ModeFTZ> {
1603 def : Pat<(i1 (OpNode Float32Regs:$a, Float32Regs:$b)),
1606 def : Pat<(i1 (OpNode Float32Regs:$a, Float32Regs:$b)),
1608 def : Pat<(i1 (OpNode Float32Regs:$a, fpimm:$b)),
1611 def : Pat<(i1 (OpNode Float32Regs:$a, fpimm:$b)),
1613 def : Pat<(i1 (OpNode fpimm:$a, Float32Regs:$b)),
1616 def : Pat<(i1 (OpNode fpimm:$a, Float32Regs:$b)),
1620 def : Pat<(i1 (OpNode Float64Regs:$a, Float64Regs:$b)),
1622 def : Pat<(i1 (OpNode Float64Regs:$a, fpimm:$b)),
1624 def : Pat<(i1 (OpNode fpimm:$a, Float64Regs:$b)),
1628 def : Pat<(i32 (OpNode Float32Regs:$a, Float32Regs:$b)),
1631 def : Pat<(i32 (OpNode Float32Regs:$a, Float32Regs:$b)),
1633 def : Pat<(i32 (OpNode Float32Regs:$a, fpimm:$b)),
1636 def : Pat<(i32 (OpNode Float32Regs:$a, fpimm:$b)),
1638 def : Pat<(i32 (OpNode fpimm:$a, Float32Regs:$b)),
1641 def : Pat<(i32 (OpNode fpimm:$a, Float32Regs:$b)),
1645 def : Pat<(i32 (OpNode Float64Regs:$a, Float64Regs:$b)),
1647 def : Pat<(i32 (OpNode Float64Regs:$a, fpimm:$b)),
1649 def : Pat<(i32 (OpNode fpimm:$a, Float64Regs:$b)),
1859 multiclass CALL<string OpcStr, SDNode OpNode> {
1861 !strconcat(OpcStr, " "), [(OpNode (i32 0))]>;
1863 !strconcat(OpcStr, " (retval0), "), [(OpNode (i32 1))]>;
1865 !strconcat(OpcStr, " (retval0, retval1), "), [(OpNode (i32 2))]>;
1867 !strconcat(OpcStr, " (retval0, retval1, retval2), "), [(OpNode (i32 3))]>;
1870 [(OpNode (i32 4))]>;
1873 [(OpNode (i32 5))]>;
1877 [(OpNode (i32 6))]>;
1881 [(OpNode (i32 7))]>;
1885 [(OpNode (i32 8))]>;