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Lines Matching refs:vT

176   . (set f128:$vT, (fcopysign f128:$vB, f128:$vA)
180 . (set f128:$vT, (fabs f128:$vB)) // xsabsqp
181 (set f128:$vT, (fneg (fabs f128:$vB))) // xsnabsqp
182 (set f128:$vT, (fneg f128:$vB)) // xsnegqp
188 (set f128:$vT, (fadd f128:$vA, f128:$vB)) // xsaddqp
189 (set f128:$vT, (fmul f128:$vA, f128:$vB)) // xsmulqp
192 (set f128:$vT, (fdiv f128:$vA, f128:$vB)) // xsdivqp
193 (set f128:$vT, (fsub f128:$vA, f128:$vB)) // xssubqp
194 (set f128:$vT, (fsqrt f128:$vB))) // xssqrtqp
213 (set f128:$vT, (PPCfaddrto f128:$vA, f128:$vB)) // xsaddqpo
214 (set f128:$vT, (PPCfmulrto f128:$vA, f128:$vB)) // xsmulqpo
217 (set f128:$vT, (PPCfdivrto f128:$vA, f128:$vB)) // xsdivqpo
218 (set f128:$vT, (PPCfsubrto f128:$vA, f128:$vB)) // xssubqpo
219 (set f128:$vT, (PPCfsqrtrto f128:$vB)) // xssqrtqpo
226 [(set f128:$vT, (fma f128:$vA, f128:$vB, f128:$vTi))]>,
227 RegConstraint<"$vTi = $vT">, NoEncode<"$vTi">,
231 [(set f128:$vT, (fma f128:$vA, f128:$vB, (fneg f128:$vTi)))]>,
232 RegConstraint<"$vTi = $vT">, NoEncode<"$vTi">,
236 [(set f128:$vT, (fneg (fma f128:$vA, f128:$vB, f128:$vTi)))]>,
237 RegConstraint<"$vTi = $vT">, NoEncode<"$vTi">,
241 [(set f128:$vT, (fneg (fma f128:$vA, f128:$vB, (fneg f128:$vTi))))]>,
242 RegConstraint<"$vTi = $vT">, NoEncode<"$vTi">,
278 [(set f128:$vT, (PPCfmarto f128:$vA, f128:$vB, f128:$vTi))]>,
279 RegConstraint<"$vTi = $vT">, NoEncode<"$vTi">,
283 [(set f128:$vT, (PPCfmarto f128:$vA, f128:$vB, (fneg f128:$vTi)))]>,
284 RegConstraint<"$vTi = $vT">, NoEncode<"$vTi">,
288 [(set f128:$vT, (fneg (PPCfmarto f128:$vA, f128:$vB, f128:$vTi)))]>,
289 RegConstraint<"$vTi = $vT">, NoEncode<"$vTi">,
293 [(set f128:$vT, (fneg (PPCfmarto f128:$vA, f128:$vB, (fneg f128:$vTi))))]>,
294 RegConstraint<"$vTi = $vT">, NoEncode<"$vTi">,
369 (set f128:$vT, (int_ppc_vsx_xsrqpi f128:$vB))
370 (set f128:$vT, (int_ppc_vsx_xsrqpix f128:$vB))
374 (set f128:$vT, (int_ppc_vsx_xsrqpxp f128:$vB))
390 (set f128:$vT, (int_ppc_vsx_xsiexpqp f128:$vA, f64:$vB))
396 (set f128:$vT, (int_ppc_vsx_xsxexpqp f128$vB)) // xsxexpqp
397 (set f128:$vT, (int_ppc_vsx_xsxsigqp f128$vB)) // xsxsigqp