Lines Matching refs:G0

139   // t<cond> %icc,  rs => t<cond> %icc, G0 + rs
141                   (TICCrr G0, IntRegs:$rs2, condVal)>,
149   // t<cond> %xcc, rs => t<cond> %xcc, G0 + rs
151                   (TXCCrr G0, IntRegs:$rs2, condVal)>,
159   // t<cond> rs=> t<cond> %icc,  G0 + rs2
161   //                (TICCrr G0, IntRegs:$rs2, condVal)>,
169   // t<cond> %icc, imm => t<cond> %icc, G0 + imm
171                   (TICCri G0, i32imm:$imm, condVal)>,
177   // t<cond> %xcc, imm => t<cond> %xcc, G0 + imm
179                   (TXCCri G0, i32imm:$imm, condVal)>,
186   // t<cond> imm => t<cond> G0 + imm
188                   (TRAPri G0, i32imm:$imm, condVal)>;
194   // t<cond> rs1 => t<cond> G0 + rs1
196                   (TRAPrr G0, IntRegs:$rs1, condVal)>;
347 def : InstAlias<"jmp $addr", (JMPLrr G0, MEMrr:$addr), 0>;
348 def : InstAlias<"jmp $addr", (JMPLri G0, MEMri:$addr), 0>;
355 def : InstAlias<"tst $rs2", (ORCCrr G0, IntRegs:$rs2, G0)>;
364 def : InstAlias<"restore", (RESTORErr G0, G0, G0)>;
367 def : InstAlias<"save", (SAVErr G0, G0, G0)>;
375 def : InstAlias<"not $rd", (XNORrr IntRegs:$rd, IntRegs:$rd, G0), 0>;
378 def : InstAlias<"not $rs1, $rd", (XNORrr IntRegs:$rd, IntRegs:$rs1, G0), 0>;
381 def : InstAlias<"neg $rd", (SUBrr IntRegs:$rd, G0, IntRegs:$rd), 0>;
384 def : InstAlias<"neg $rs2, $rd", (SUBrr IntRegs:$rd, G0, IntRegs:$rs2), 0>;
411 def : InstAlias<"btst $rs2, $rs1", (ANDCCrr G0, IntRegs:$rs1, IntRegs:$rs2), 0>;
412 def : InstAlias<"btst $simm13, $rs1", (ANDCCri G0, IntRegs:$rs1, i32imm:$simm13), 0>;
428 def : InstAlias<"clr $rd", (ORrr IntRegs:$rd, G0, G0), 0>;
431 def : InstAlias<"clrb [$addr]", (STBrr MEMrr:$addr, G0), 0>;
432 def : InstAlias<"clrb [$addr]", (STBri MEMri:$addr, G0), 0>;
433 def : InstAlias<"clrh [$addr]", (STHrr MEMrr:$addr, G0), 0>;
434 def : InstAlias<"clrh [$addr]", (STHri MEMri:$addr, G0), 0>;
435 def : InstAlias<"clr [$addr]", (STrr MEMrr:$addr, G0), 0>;
436 def : InstAlias<"clr [$addr]", (STri MEMri:$addr, G0), 0>;
440 def : InstAlias<"mov $rs2, $rd", (ORrr IntRegs:$rd, G0, IntRegs:$rs2)>;
441 def : InstAlias<"mov $simm13, $rd", (ORri IntRegs:$rd, G0, i32imm:$simm13)>;
450 def : InstAlias<"mov $rs2, $asr", (WRASRrr ASRRegs:$asr, G0, IntRegs:$rs2), 0>;
451 def : InstAlias<"mov $simm13, $asr", (WRASRri ASRRegs:$asr, G0, i32imm:$simm13), 0>;
452 def : InstAlias<"mov $rs2, %psr", (WRPSRrr G0, IntRegs:$rs2), 0>;
453 def : InstAlias<"mov $simm13, %psr", (WRPSRri G0, i32imm:$simm13), 0>;
454 def : InstAlias<"mov $rs2, %wim", (WRWIMrr G0, IntRegs:$rs2), 0>;
455 def : InstAlias<"mov $simm13, %wim", (WRWIMri G0, i32imm:$simm13), 0>;
456 def : InstAlias<"mov $rs2, %tbr", (WRTBRrr G0, IntRegs:$rs2), 0>;
457 def : InstAlias<"mov $simm13, %tbr", (WRTBRri G0, i32imm:$simm13), 0>;
464 def : InstAlias<"wr $rs2, $asr", (WRASRrr ASRRegs:$asr, G0, IntRegs:$rs2), 0>;
465 def : InstAlias<"wr $simm13, $asr", (WRASRri ASRRegs:$asr, G0, i32imm:$simm13), 0>;
466 def : InstAlias<"wr $rs2, %psr", (WRPSRrr G0, IntRegs:$rs2), 0>;
467 def : InstAlias<"wr $simm13, %psr", (WRPSRri G0, i32imm:$simm13), 0>;
468 def : InstAlias<"wr $rs2, %wim", (WRWIMrr G0, IntRegs:$rs2), 0>;
469 def : InstAlias<"wr $simm13, %wim", (WRWIMri G0, i32imm:$simm13), 0>;
470 def : InstAlias<"wr $rs2, %tbr", (WRTBRrr G0, IntRegs:$rs2), 0>;
471 def : InstAlias<"wr $simm13, %tbr", (WRTBRri G0, i32imm:$simm13), 0>;
503 def : InstAlias<"signx $rd", (SRArr IntRegs:$rd, IntRegs:$rd, G0), 0>, Requires<[HasV9]>;
506 def : InstAlias<"signx $rs1, $rd", (SRArr IntRegs:$rd, IntRegs:$rs1, G0), 0>, Requires<[HasV9]>;