Lines Matching refs:BitShift
3238 SDValue BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr, in lowerATOMIC_LOAD_OP() local
3240 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP()
3245 DAG.getConstant(0, DL, WideVT), BitShift); in lowerATOMIC_LOAD_OP()
3262 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift, in lowerATOMIC_LOAD_OP()
3269 SDValue ResultShift = DAG.getNode(ISD::ADD, DL, WideVT, BitShift, in lowerATOMIC_LOAD_OP()
3342 SDValue BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr, in lowerATOMIC_CMP_SWAP() local
3344 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_CMP_SWAP()
3349 DAG.getConstant(0, DL, WideVT), BitShift); in lowerATOMIC_CMP_SWAP()
3353 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift, in lowerATOMIC_CMP_SWAP()
5326 unsigned BitShift = (IsSubWord ? MI.getOperand(4).getReg() : 0); in emitAtomicLoadBinary() local
5380 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadBinary()
5442 unsigned BitShift = (IsSubWord ? MI.getOperand(4).getReg() : 0); in emitAtomicLoadMinMax() local
5495 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadMinMax()
5555 unsigned BitShift = MI.getOperand(5).getReg(); in emitAtomicCmpSwapW() local
5617 .addReg(OldVal).addReg(BitShift).addImm(BitSize); in emitAtomicCmpSwapW()