Lines Matching refs:BaseOpc
2724 unsigned BaseOpc, CondOpc; in fastLowerIntrinsicCall() local
2728 BaseOpc = UseIncDec ? unsigned(X86ISD::INC) : unsigned(ISD::ADD); in fastLowerIntrinsicCall()
2732 BaseOpc = ISD::ADD; CondOpc = X86::SETBr; break; in fastLowerIntrinsicCall()
2734 BaseOpc = UseIncDec ? unsigned(X86ISD::DEC) : unsigned(ISD::SUB); in fastLowerIntrinsicCall()
2738 BaseOpc = ISD::SUB; CondOpc = X86::SETBr; break; in fastLowerIntrinsicCall()
2740 BaseOpc = X86ISD::SMUL; CondOpc = X86::SETOr; break; in fastLowerIntrinsicCall()
2742 BaseOpc = X86ISD::UMUL; CondOpc = X86::SETOr; break; in fastLowerIntrinsicCall()
2758 if (BaseOpc == X86ISD::INC || BaseOpc == X86ISD::DEC) { in fastLowerIntrinsicCall()
2760 bool IsDec = BaseOpc == X86ISD::DEC; in fastLowerIntrinsicCall()
2765 ResultReg = fastEmit_ri(VT, VT, BaseOpc, LHSReg, LHSIsKill, in fastLowerIntrinsicCall()
2776 ResultReg = fastEmit_rr(VT, VT, BaseOpc, LHSReg, LHSIsKill, RHSReg, in fastLowerIntrinsicCall()
2782 if (BaseOpc == X86ISD::UMUL && !ResultReg) { in fastLowerIntrinsicCall()
2793 } else if (BaseOpc == X86ISD::SMUL && !ResultReg) { in fastLowerIntrinsicCall()