Lines Matching refs:IdxVal
4416 static SDValue extractSubVector(SDValue Vec, unsigned IdxVal, SelectionDAG &DAG, in extractSubVector() argument
4436 IdxVal &= ~(ElemsPerChunk - 1); in extractSubVector()
4441 dl, ResultVT, makeArrayRef(Vec->op_begin() + IdxVal, ElemsPerChunk)); in extractSubVector()
4443 SDValue VecIdx = DAG.getIntPtrConstant(IdxVal, dl); in extractSubVector()
4453 static SDValue extract128BitVector(SDValue Vec, unsigned IdxVal, in extract128BitVector() argument
4457 return extractSubVector(Vec, IdxVal, DAG, dl, 128); in extract128BitVector()
4461 static SDValue extract256BitVector(SDValue Vec, unsigned IdxVal, in extract256BitVector() argument
4464 return extractSubVector(Vec, IdxVal, DAG, dl, 256); in extract256BitVector()
4467 static SDValue insertSubVector(SDValue Result, SDValue Vec, unsigned IdxVal, in insertSubVector() argument
4485 IdxVal &= ~(ElemsPerChunk - 1); in insertSubVector()
4487 SDValue VecIdx = DAG.getIntPtrConstant(IdxVal, dl); in insertSubVector()
4497 static SDValue insert128BitVector(SDValue Result, SDValue Vec, unsigned IdxVal, in insert128BitVector() argument
4506 if (IdxVal == 0 && Result.getValueType().is256BitVector() && in insert128BitVector()
4544 return insertSubVector(Result, Vec, IdxVal, DAG, dl, 128); in insert128BitVector()
4547 static SDValue insert256BitVector(SDValue Result, SDValue Vec, unsigned IdxVal, in insert256BitVector() argument
4550 return insertSubVector(Result, Vec, IdxVal, DAG, dl, 256); in insert256BitVector()
4565 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); in insert1BitVector() local
4566 if (IdxVal == 0 && Vec.isUndef()) // the operation is legal in insert1BitVector()
4574 assert(IdxVal + SubVecNumElems <= NumElems && in insert1BitVector()
4575 IdxVal % SubVecVT.getSizeInBits() == 0 && in insert1BitVector()
4603 if (IdxVal != 0) { in insert1BitVector()
4604 SDValue ShiftBits = DAG.getConstant(IdxVal, dl, MVT::i8); in insert1BitVector()
4613 unsigned ShiftRight = NumElems - SubVecNumElems - IdxVal; in insert1BitVector()
4621 if (IdxVal == 0) { in insert1BitVector()
4636 if (IdxVal + SubVecNumElems == NumElems) { in insert1BitVector()
4639 DAG.getConstant(IdxVal, dl, MVT::i8)); in insert1BitVector()
4652 Mask.push_back(i >= IdxVal && i < IdxVal + SubVecNumElems ? in insert1BitVector()
6951 SDValue IdxVal = DAG.getIntPtrConstant(SubVecNumElts * OpIdx, dl); in LowerCONCAT_VECTORSvXi1() local
6953 Op.getOperand(OpIdx), IdxVal); in LowerCONCAT_VECTORSvXi1()
6992 SDValue IdxVal = DAG.getIntPtrConstant(NumElems/2, dl); in LowerCONCAT_VECTORSvXi1() local
6994 V2 = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Undef, V2, IdxVal); in LowerCONCAT_VECTORSvXi1()
6997 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, ZeroVec, V2, IdxVal); in LowerCONCAT_VECTORSvXi1()
7000 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, V1, V2, IdxVal); in LowerCONCAT_VECTORSvXi1()
12402 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); in ExtractBitFromMaskVector() local
12413 DAG.getConstant(MaxSift - IdxVal, dl, MVT::i8)); in ExtractBitFromMaskVector()
12453 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); in LowerEXTRACT_VECTOR_ELT() local
12459 Vec = extract128BitVector(Vec, IdxVal, DAG, dl); in LowerEXTRACT_VECTOR_ELT()
12467 IdxVal &= ElemsPerChunk - 1; in LowerEXTRACT_VECTOR_ELT()
12469 DAG.getConstant(IdxVal, dl, MVT::i32)); in LowerEXTRACT_VECTOR_ELT()
12481 if (IdxVal == 0) in LowerEXTRACT_VECTOR_ELT()
12495 if (IdxVal == 0) in LowerEXTRACT_VECTOR_ELT()
12499 int Mask[4] = { static_cast<int>(IdxVal), -1, -1, -1 }; in LowerEXTRACT_VECTOR_ELT()
12509 if (IdxVal == 0) in LowerEXTRACT_VECTOR_ELT()
12545 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); in InsertBitToMaskVector() local
12547 if (IdxVal) in InsertBitToMaskVector()
12549 DAG.getConstant(IdxVal, dl, MVT::i8)); in InsertBitToMaskVector()
12571 unsigned IdxVal = N2C->getZExtValue(); in LowerINSERT_VECTOR_ELT() local
12581 ClearMask.push_back(i == IdxVal ? i + NumElts : i); in LowerINSERT_VECTOR_ELT()
12591 if (VT.is256BitVector() && IdxVal == 0) { in LowerINSERT_VECTOR_ELT()
12604 SDValue V = extract128BitVector(N0, IdxVal, DAG, dl); in LowerINSERT_VECTOR_ELT()
12610 unsigned IdxIn128 = IdxVal & (NumEltsIn128 - 1); in LowerINSERT_VECTOR_ELT()
12616 return insert128BitVector(N0, V, IdxVal, DAG, dl); in LowerINSERT_VECTOR_ELT()
12635 N2 = DAG.getIntPtrConstant(IdxVal, dl); in LowerINSERT_VECTOR_ELT()
12650 if (IdxVal == 0 && (!MinSize || !MayFoldLoad(N1))) { in LowerINSERT_VECTOR_ELT()
12662 N2 = DAG.getIntPtrConstant(IdxVal << 4, dl); in LowerINSERT_VECTOR_ELT()
12683 N2 = DAG.getIntPtrConstant(IdxVal, dl); in LowerINSERT_VECTOR_ELT()
12725 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); in LowerEXTRACT_SUBVECTOR() local
12733 return extract128BitVector(In, IdxVal, DAG, dl); in LowerEXTRACT_SUBVECTOR()
12737 return extract256BitVector(In, IdxVal, DAG, dl); in LowerEXTRACT_SUBVECTOR()
12759 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); in LowerINSERT_SUBVECTOR() local
12767 if ((IdxVal == OpVT.getVectorNumElements() / 2) && in LowerINSERT_SUBVECTOR()
12791 return insert128BitVector(Vec, SubVec, IdxVal, DAG, dl); in LowerINSERT_SUBVECTOR()
12794 return insert256BitVector(Vec, SubVec, IdxVal, DAG, dl); in LowerINSERT_SUBVECTOR()
26425 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); in combineExtractVectorElt() local
26426 DAG.ReplaceAllUsesOfValueWith(SDValue(Extract, 0), Vals[IdxVal]); in combineExtractVectorElt()