Lines Matching refs:VSEXT
14145 DAG.getNode(X86ISD::VSEXT, DL, MVT::v16i32, In)); in LowerTRUNCATE()
16023 return DAG.getNode(X86ISD::VSEXT, dl, VT, In); in LowerSIGN_EXTEND_AVX512()
16031 if (In.getOpcode() == X86ISD::VSEXT || In.getOpcode() == X86ISD::VZEXT) in LowerSIGN_EXTEND_AVX512()
16033 return DAG.getNode(X86ISD::VSEXT, dl, VT, In); in LowerSIGN_EXTEND_AVX512()
16080 return DAG.getNode(X86ISD::VSEXT, dl, VT, In); in LowerSIGN_EXTEND_VECTOR_INREG()
16132 return DAG.getNode(X86ISD::VSEXT, dl, VT, In); in LowerSIGN_EXTEND()
16161 OpLo = DAG.getNode(X86ISD::VSEXT, dl, HalfVT, OpLo); in LowerSIGN_EXTEND()
16162 OpHi = DAG.getNode(X86ISD::VSEXT, dl, HalfVT, OpHi); in LowerSIGN_EXTEND()
16479 SDValue Sext = DAG.getNode(X86ISD::VSEXT, dl, RegVT, SlicedVec); in LowerExtendedLoad()
19339 ALo = DAG.getNode(X86ISD::VSEXT, dl, ExVT, A); in LowerMUL()
19340 BLo = DAG.getNode(X86ISD::VSEXT, dl, ExVT, B); in LowerMUL()
19359 AHi = DAG.getNode(X86ISD::VSEXT, dl, ExVT, AHi); in LowerMUL()
19360 BHi = DAG.getNode(X86ISD::VSEXT, dl, ExVT, BHi); in LowerMUL()
19468 unsigned ExSSE41 = (ISD::MULHU == Opcode ? X86ISD::VZEXT : X86ISD::VSEXT); in LowerMULH()
22175 case X86ISD::VSEXT: return "X86ISD::VSEXT"; in getTargetNodeName()
29047 SDValue NewVec = DAG.getNode(X86ISD::VSEXT, dl, VT, WideLd); in combineMaskedLoad()