4605       WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, WideSubVec, ShiftBits);  in insert1BitVector()
4614     Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, WideSubVec,  in insert1BitVector()
4626     Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, Vec, ShiftBits);  in insert1BitVector()
4638     WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, WideSubVec,  in insert1BitVector()
4642     Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, Vec, ShiftBits);  in insert1BitVector()
7878     unsigned OpCode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI)  in lowerVectorShuffleAsShift()
12412   Vec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, Vec,  in ExtractBitFromMaskVector()
12548     EltInVec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, EltInVec,  in InsertBitToMaskVector()
17053   assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI)  in getTargetVShiftByConstNode()
17066     case X86ISD::VSHLI:  in getTargetVShiftByConstNode()
17127     case X86ISD::VSHLI: Opc = X86ISD::VSHL; break;  in getTargetVShiftNode()
19435     AhiBlo = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, VT, AhiBlo, 32, DAG);  in LowerMUL()
19439     AloBhi = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, VT, AloBhi, 32, DAG);  in LowerMUL()
19761   unsigned X86Opc = (Op.getOpcode() == ISD::SHL) ? X86ISD::VSHLI :  in LowerScalarImmediateShift()
19836           SDValue SHL = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ShiftVT,  in LowerScalarImmediateShift()
19931   unsigned X86OpcI = (Op.getOpcode() == ISD::SHL) ? X86ISD::VSHLI :  in LowerScalarVariableShift()
22190   case X86ISD::VSHLI:              return "X86ISD::VSHLI";  in getTargetNodeName()
29637     Reg = getTargetVShiftNode(X86ISD::VSHLI, DL, MVT::v4i32, Reg, ShAmt, DAG);  in combineVectorTruncationWithPACKSS()