77   X86ScalarSSEf32 = Subtarget.hasSSE1();  in X86TargetLowering()
246     if (Subtarget.hasSSE1() && !Subtarget.hasSSE3())  in X86TargetLowering()
432   if (Subtarget.hasSSE1())  in X86TargetLowering()
719   if (!Subtarget.useSoftFloat() && Subtarget.hasSSE1()) {  in X86TargetLowering()
1786   if (Subtarget.hasSSE1())  in getByValTypeAlignment()
1826       if (Subtarget.hasSSE1())  in getOptimalMemOpType()
2108           (Subtarget.is64Bit() && !Subtarget.hasSSE1())) {  in LowerReturn()
2299         ((Is64Bit || Ins[i].Flags.isInReg()) && !Subtarget.hasSSE1())) {  in LowerCallResult()
2546   if (isSoftFloat || NoImplicitFloatOps || !Subtarget.hasSSE1())  in get64BitArgumentXMMs()
2729     assert(!(NumXMMRegs && !Subtarget.hasSSE1()) &&  in LowerFormalArguments()
3209     assert((Subtarget.hasSSE1() || !NumXMMRegs)  in LowerCall()
14932   if (VT == MVT::f32 && Subtarget.hasSSE1())  in getRsqrtEstimate()
14934   else if ((VT == MVT::v4f32 && Subtarget.hasSSE1()) ||  in getRsqrtEstimate()
14964   if (VT == MVT::f32 && Subtarget.hasSSE1())  in getRecipEstimate()
14966   else if ((VT == MVT::v4f32 && Subtarget.hasSSE1()) ||  in getRecipEstimate()
15734        (Subtarget.hasSSE1() && VT == MVT::f32)) &&  in LowerSELECT()
16985            Subtarget.hasSSE1());  in LowerVAARG()
26281   if (((Subtarget.hasSSE1() && VT == MVT::f32) ||  in combineBitcast()
26454        (Subtarget.hasSSE1() && VT.getScalarType() == MVT::f32))) {  in combineSelect()
28186       ((Subtarget.hasSSE1() && VT == MVT::i32) ||  in convertIntLogicToFPLogic()
29851   if (!((Subtarget.hasSSE1() && (VT == MVT::f32 || VT == MVT::v4f32)) ||  in combineFMinNumFMaxNum()
30346   if (Subtarget.hasSSE1() && !Subtarget.hasSSE2() && VT == MVT::v4i32)  in combineSetCC()
31324     if (((type->getPrimitiveSizeInBits() == 128) && Subtarget.hasSSE1()) ||  in getSingleConstraintMatchWeight()
31397     if (Subtarget.hasSSE1())  in LowerXConstraint()
31698       if (!Subtarget.hasSSE1()) break;  in getRegForInlineAsmConstraint()