72     BasePtr = Use64BitReg ? X86::RBX : X86::EBX;  in X86RegisterInfo()
77     BasePtr = X86::ESI;  in X86RegisterInfo()
462     unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), 64);  in getReservedRegs()  local
463     for (MCSubRegIterator I(BasePtr, this, /*IncludeSelf=*/true);  in getReservedRegs()
563     return MRI->canReserveReg(BasePtr);  in canRealignStack()
582   unsigned BasePtr;  in eliminateFrameIndex()  local
589     BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());  in eliminateFrameIndex()
591     BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);  in eliminateFrameIndex()
593     BasePtr = StackPtr;  in eliminateFrameIndex()
595     BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr);  in eliminateFrameIndex()
614   if (Opc == X86::LEA64_32r && X86::GR32RegClass.contains(BasePtr))  in eliminateFrameIndex()
615     BasePtr = getX86SubSuperRegister(BasePtr, 64);  in eliminateFrameIndex()
619   MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);  in eliminateFrameIndex()
630   if (BasePtr == StackPtr)  in eliminateFrameIndex()
636     assert(BasePtr == FramePtr && "Expected the FP as base register");  in eliminateFrameIndex()