Lines Matching refs:interleaved

1 ; RUN: llc -mtriple=aarch64 -lower-interleaved-accesses=true < %s | FileCheck %s -check-prefix=NEON
2 ; RUN: llc -mtriple=aarch64 -lower-interleaved-accesses=true -mattr=-neon < %s | FileCheck %s -chec…
47 …%interleaved.vec = shufflevector <8 x i8> %v0, <8 x i8> %v1, <16 x i32> <i32 0, i32 8, i32 1, i32 …
48   store <16 x i8> %interleaved.vec, <16 x i8>* %ptr, align 4
60 …%interleaved.vec = shufflevector <8 x i32> %v0_v1, <8 x i32> %v2_u, <12 x i32> <i32 0, i32 4, i32 …
61   store <12 x i32> %interleaved.vec, <12 x i32>* %base, align 4
73 …%interleaved.vec = shufflevector <8 x i32> %v0_v1, <8 x i32> %v2_v3, <16 x i32> <i32 0, i32 4, i32…
74   store <16 x i32> %interleaved.vec, <16 x i32>* %base, align 4
78 ; The following cases test that interleaved access of pointer vectors can be
126 …%interleaved.vec = shufflevector <2 x i32*> %v0, <2 x i32*> %v1, <4 x i32> <i32 0, i32 2, i32 1, i…
127   store <4 x i32*> %interleaved.vec, <4 x i32*>* %base, align 4
139 …%interleaved.vec = shufflevector <4 x i32*> %v0_v1, <4 x i32*> %v2_u, <6 x i32> <i32 0, i32 2, i32…
140   store <6 x i32*> %interleaved.vec, <6 x i32*>* %base, align 4
152 …%interleaved.vec = shufflevector <4 x i32*> %v0_v1, <4 x i32*> %v2_v3, <8 x i32> <i32 0, i32 2, i3…
153   store <8 x i32*> %interleaved.vec, <8 x i32*>* %base, align 4
205 …%interleaved.vec = shufflevector <4 x i32> %v0, <4 x i32> %v1, <8 x i32> <i32 undef, i32 undef, i3…
206   store <8 x i32> %interleaved.vec, <8 x i32>* %base, align 4
218 …%interleaved.vec = shufflevector <8 x i32> %v0_v1, <8 x i32> %v2_u, <12 x i32> <i32 0, i32 4, i32 …
219   store <12 x i32> %interleaved.vec, <12 x i32>* %base, align 4
231 …%interleaved.vec = shufflevector <8 x i32> %v0_v1, <8 x i32> %v2_v3, <16 x i32> <i32 0, i32 4, i32…
232   store <16 x i32> %interleaved.vec, <16 x i32>* %base, align 4