Lines Matching refs:RESULT

14 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
15 ; SI-NEXT: buffer_store_dword [[RESULT]]
29 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
30 ; SI-NEXT: buffer_store_dword [[RESULT]]
45 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
46 ; SI-NEXT: buffer_store_dword [[RESULT]]
61 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
62 ; SI-NEXT: buffer_store_dword [[RESULT]]
76 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[COND]]
77 ; SI-NEXT: buffer_store_dword [[RESULT]]
89 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[COND]]
90 ; SI-NEXT: buffer_store_dword [[RESULT]]
104 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
105 ; SI-NEXT: buffer_store_dword [[RESULT]]
118 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
119 ; SI-NEXT: buffer_store_dword [[RESULT]]
132 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
133 ; SI: buffer_store_dword [[RESULT]]
150 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
151 ; SI: buffer_store_dword [[RESULT]]
170 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
171 ; SI: buffer_store_dword [[RESULT]]
190 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
191 ; SI-NEXT: buffer_store_dword [[RESULT]]
205 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
206 ; SI-NEXT: buffer_store_dword [[RESULT]]
221 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
222 ; SI-NEXT: buffer_store_dword [[RESULT]]
237 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, [[CMP]]
238 ; SI-NEXT: buffer_store_dword [[RESULT]]
275 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
276 ; SI-NEXT: buffer_store_dword [[RESULT]]
290 ; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc
291 ; SI: buffer_store_dword [[RESULT]]
476 ; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
477 ; SI: buffer_store_dword [[RESULT]]
488 ; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
489 ; SI: buffer_store_dword [[RESULT]]