Lines Matching refs:FPU

64 …e=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
65 …inux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
66 …linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
67 …bi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
68 …-mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
200 ;; The default choice made by llc is for a V6 CPU without an FPU.
203 ;; FPU support!
219 ;; Despite the V6 CPU having no FPU by default, we chose to flush to
234 ;; The default choice made by llc is for a V6M CPU without an FPU.
237 ;; FPU support!
253 ;; Despite the V6M CPU having no FPU by default, we chose to flush to
296 ;; The default choice made by llc is for a V7M CPU without an FPU.
299 ;; FPU support!
315 ;; Despite the V7M CPU having no FPU by default, we chose to flush
342 ;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
360 ;; The default does have an FPU, and for V8-A, it flushes preserving sign.
454 ;; Despite there being no FPU, we chose to flush to zero preserving
459 ;; The VFPv4 FPU flushes preserving sign.
534 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
558 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
583 ;; Despite there being no FPU, we chose to flush to zero preserving
637 ;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
690 ;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
698 ;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
724 ;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
750 ;; Despite there being no FPU, we chose to flush to zero preserving
781 ;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
807 ;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
833 ;; Despite there being no FPU, we chose to flush to zero preserving
864 ;; Despite the M0 CPU having no FPU in this scenario, we chose to
896 ;; Despite the M0+ CPU having no FPU in this scenario, we chose to
928 ;; Despite the M1 CPU having no FPU in this scenario, we chose to
960 ;; Despite the SC000 CPU having no FPU in this scenario, we chose to
992 ;; Despite there being no FPU, we chose to flush to zero preserving
1022 ;; Despite there being no FPU, we chose to flush to zero preserving
1053 ;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1083 ;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1118 ;; Despite there being no FPU, we chose to flush to zero preserving
1458 ; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1459 ; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1460 ; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1461 ; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1462 ; GENERIC-FPU-NEON-FP16: .fpu neon-fp16