Lines Matching +full:cast +full:- +full:align
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
3 …t datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:1…
4 target triple = "nvptx64-nvidia-cuda"
6 ; CHECK-LABEL: t1
8 ; CHECK-NOT: ld.v4
9 ; CHECK-NOT: ld.v2
10 ; CHECK-NOT: ld.f32
12 %cast = bitcast i8* %p1 to <4 x float>*
13 %r = load <4 x float>, <4 x float>* %cast, align 1
17 ; CHECK-LABEL: t2
19 ; CHECK-NOT: ld.v4
20 ; CHECK-NOT: ld.v2
22 %cast = bitcast i8* %p1 to <4 x float>*
23 %r = load <4 x float>, <4 x float>* %cast, align 4
27 ; CHECK-LABEL: t3
29 ; CHECK-NOT: ld.v4
31 %cast = bitcast i8* %p1 to <4 x float>*
32 %r = load <4 x float>, <4 x float>* %cast, align 8
36 ; CHECK-LABEL: t4
39 %cast = bitcast i8* %p1 to <4 x float>*
40 %r = load <4 x float>, <4 x float>* %cast, align 16
45 ; CHECK-LABEL: s1
47 ; CHECK-NOT: st.v4
48 ; CHECK-NOT: st.v2
49 ; CHECK-NOT: st.f32
51 store <4 x float> %v, <4 x float>* %p1, align 1
55 ; CHECK-LABEL: s2
57 ; CHECK-NOT: st.v4
58 ; CHECK-NOT: st.v2
60 store <4 x float> %v, <4 x float>* %p1, align 4
64 ; CHECK-LABEL: s3
66 ; CHECK-NOT: st.v4
67 store <4 x float> %v, <4 x float>* %p1, align 8
71 ; CHECK-LABEL: s4
74 store <4 x float> %v, <4 x float>* %p1, align 16