73         if (R.match(Inst->TheDef->getName()))  in apply()
74           Elts.insert(Inst->TheDef);  in apply()
214     Record *SchedDef = Inst->TheDef;  in collectSchedRW()
293     findRWs(WI->TheDef->getValueAsListOfDefs("Writes"), WI->Sequence,  in collectSchedRW()
346     if (I->TheDef == Def)  in getSchedRWIdx()
354     Record *ReadDef = SchedReads[i].TheDef;  in hasReadOfWrite()
409     SchedRW.TheDef ? SchedRW.TheDef->getValueAsInt("Repeat") : 1;  in expandRWSequence()
435       PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases "  in expandRWSeqForProc()
438     AliasDef = AliasRW.TheDef;  in expandRWSeqForProc()
450     SchedWrite.TheDef ? SchedWrite.TheDef->getValueAsInt("Repeat") : 1;  in expandRWSeqForProc()
508     Record *ItinDef = Inst->TheDef->getValueAsDef("Itinerary");  in collectSchedClasses()
510     if (!Inst->TheDef->isValueUnset("SchedRW"))  in collectSchedClasses()
511       findRWs(Inst->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads);  in collectSchedClasses()
517     InstrClassMap[Inst->TheDef] = SCIdx;  in collectSchedClasses()
533     std::string InstName = Inst->TheDef->getName();  in collectSchedClasses()
534     unsigned SCIdx = InstrClassMap.lookup(Inst->TheDef);  in collectSchedClasses()
537         dbgs() << "No machine model for " << Inst->TheDef->getName() << '\n';  in collectSchedClasses()
542       PrintFatalError(Inst->TheDef->getLoc(), "Instruction's sched class "  in collectSchedClasses()
580         dbgs() << "No machine model for " << Inst->TheDef->getName()  in collectSchedClasses()
604   return InstrClassMap.lookup(Inst.TheDef);  in getSchedClassIdx()
993     RecVec Variants = SchedRW.TheDef->getValueAsListOfDefs("Variants");  in mutuallyExclusive()
1066     if (SchedRW.TheDef->getValueInit("SchedModel")->isComplete()) {  in getIntersectingVariants()
1067       Record *ModelDef = SchedRW.TheDef->getValueAsDef("SchedModel");  in getIntersectingVariants()
1071     const RecVec VarDefs = SchedRW.TheDef->getValueAsListOfDefs("Variants");  in getIntersectingVariants()
1091       const RecVec VarDefs = AliasRW.TheDef->getValueAsListOfDefs("Variants");  in getIntersectingVariants()
1097         TransVariant(AliasRW.TheDef, SchedRW.Index, AliasProcIdx, 0));  in getIntersectingVariants()
1139     PrintFatalError(SchedRW.TheDef->getLoc(), "No variant of this type has "  in getIntersectingVariants()
1560         if (Inst->TheDef->isValueUnset("SchedRW") && !HadCompleteModel) {  in checkCompleteness()
1562                      + Inst->TheDef->getName() + "'");  in checkCompleteness()
1582                    Inst->TheDef->getName() + "'");  in checkCompleteness()
1628   if (SchedRW.TheDef) {  in collectRWResources()
1629     if (!IsRead && SchedRW.TheDef->isSubClassOf("SchedWriteRes")) {  in collectRWResources()
1631         addWriteRes(SchedRW.TheDef, Idx);  in collectRWResources()
1633     else if (IsRead && SchedRW.TheDef->isSubClassOf("SchedReadAdvance")) {  in collectRWResources()
1635         addReadAdvance(SchedRW.TheDef, Idx);  in collectRWResources()
1778   for (const Record *TheDef : UnsupportedFeaturesDefs) {  in isUnsupported()  local
1779     for (const Record *PredDef : Inst.TheDef->getValueAsListOfDefs("Predicates")) {  in isUnsupported()
1780       if (TheDef->getName() == PredDef->getName())  in isUnsupported()